ICS9248-50_1 ICST [Integrated Circuit Systems], ICS9248-50_1 Datasheet - Page 3

• Manufacturer Part Number: ICS9248-50_1
• Description: Frequency Timing Generator for Pentium II Systems
• Manufacturer: ICST [Integrated Circuit Systems]

Notes.
1. Clock on latency is defined from when the clock enable goes active to when the first valid clock comes out of the device.
2. Clock off latency is defined from when the clock enable goes inactive to when the last clock is driven low out of the device.
3. Power up latency is when PD# goes inactive (high) to when the first valid clocks are output by the device.
4. Power down has controlled clock counts applicable to CPUCLK, PCICLK only.
0278I—06/03/03
Select Functions
ICS9248-50 Power Management Requirements
Power Management
Clock Enable Configuration
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