CAT1022 CATALYST [Catalyst Semiconductor], CAT1022 Datasheet - Page 10

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CAT1022

Manufacturer Part Number
CAT1022
Description
Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM, Manual Reset and Watchdog Timer
Manufacturer
CATALYST [Catalyst Semiconductor]
Datasheet
Figure 7. Slave Address Bits
ACKNOWLEDGE
After a successful data transfer, each receiving device
is required to generate an acknowledge. The
acknowledging device pulls down the SDA line during
the ninth clock cycle, signaling that it received the 8 bits
of data.
All devices respond with an acknowledge after receiving
a START condition and its slave address. If the device
has been selected along with a write operation, it
responds with an acknowledge after receiving each 8-
bit byte.
When a device begins a READ mode it transmits 8 bits
of data, releases the SDA line and monitors the line for
an acknowledge. Once it receives this acknowledge, the
device will continue to transmit data. If no acknowledge
is sent by the Master, the device terminates data
transmission and waits for a STOP condition.
CAT1021, CAT1022, CAT1023
Doc. No. 3009, Rev. K
Figure 6. Acknowledge Timing
Figure 5. Start/Stop Timing
Default Configuration
CAT
FROM TRANSMITTER
FROM RECEIVER
SDA
SCL
DATA OUTPUT
DATA OUTPUT
SCL FROM
MASTER
1
START BIT
START
0
1
0
1
0
10
WRITE OPERATIONS
Byte Write
In the Byte Write mode, the Master device sends the
START condition and the slave address information (with
the R/W bit set to zero) to the Slave device. After the Slave
generates an acknowledge, the Master sends a 8-bit
address that is to be written into the address pointers of
the device. After receiving another acknowledge from the
Slave, the Master device transmits the data to be written
into the addressed memory location. The device
acknowledges once more and the Master generates the
STOP condition. At this time, the device begins an
internal programming cycle to non-volatile memory. While
the cycle is in progress, the device will not respond to any
request from the Master device.
0
0
R/W
8
ACKNOWLEDGE
STOP BIT
9

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