ICS9159-07 ICST [Integrated Circuit Systems], ICS9159-07 Datasheet - Page 7

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ICS9159-07

Manufacturer Part Number
ICS9159-07
Description
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet
V
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
Electrical Characteristics at 5.5V
Rise Time
Fall Time
Rise Time
Fall Time
Duty Cycle
CPU(0:2)
BUS(0:6)
Jitter, One Sigma
Jitter, Absolute
Input Frequency
Logic Input Capacitance
Crystal Oscillator Capacitance
Frequency Transition Time
Frequency Transition Time (to DOZE)
Frequency Settling Time
Skew
DD
= 4.5 – 5.5 V, T
1
1
1
1
1
1
1
1
1
PARAMETER
A
= 0 – 70
1
1
1
Jitter
Slew
Jitter
Slew
CPU to CPU
CPU to BUS(0:5)
CPU to BUS(6)
BUS(0:5) to BUS(0:5)
BUS(0:5) to BUS(6)
1
°
1
1
1
1
C
Cycle-to-Cycle
Cycle-to-Cycle
1
SYMBOL
T
AC Characteristics
C
T
T
T
T
T
T
SR
SR
C
T
T
T
T
T
T
T
SK3S
D
T
F
jcc1
jcc2
INX
t
SK1
SK2
SK4
SK5
r1
f1
r2
f2
jab
IN
a1
a2
s
jis
i
t
1
2
7
20pF load; 0.8 to 2.0V
20pF load; 2.0 to 0.8V
20pF load; 20% to 80%
20pF load; 80% to 20%
20pF load; VOUT=1.4V
Load=10pF
Load=10pF; 0.8 to 2.0V
Load=10pF
Load=30pF; 0.8 to 2.0V
Fixed CLK; Load=20pF;
Comp. to the period
Fixed CLK; Load=20pF;
Comp. to the period
Logic input pins
X1, X2 pins
Acquisition from 35 MHz
to 65 MHz (first crossing)
(and 65 to 35).
Acquisition from 10 MHz
to 65 MHz (first crossing)
(and 65 to 10)
From 1 st crossing of
acquisition to <1% settling.
CL=10pF VO=1.5V
TEST CONDITIONS
-1600
MIN
-1750
-150
-250
-250
-500
-900
12.0
1.6
1.0
45
-
-
-
-
-
-
-
-
-
-
-
14.318
ICS9159-07
-1250
TYP
-800
-400
0.55
0.52
0.50
0.78
400
1.2
1.1
2.6
1.6
50
50
18
1
2
5
-
-
-
MAX
+150
+250
+500
-750
-100
0.95
0.90
16.0
250
2.1
2.0
1.5
2.4
55
3
5
0
-
-
-
-
-
UNITS
MHz
V/ns
V/ns
pF
pF
ms
ms
ms
ns
ns
ns
ns
%
ps
ps
%
%
ps

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