CY7C128A-35LMB CYPRESS [Cypress Semiconductor], CY7C128A-35LMB Datasheet - Page 4

• Manufacturer Part Number: CY7C128A-35LMB
• Description: 2K x 8 Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Waveforms
Read Cycle No. 1
Read Cycle No. 2
Write Cycle No. 1 (WE Controlled)
Notes:
10. WE is HIGH for read cycle.
12. Address valid prior to or coincident with CE transition LOW.
13. Data I/O pins enter high-impedance state, as shown, when OE is held LOW during write.
11. Device is continuously selected. OE, CE = V
DATA OUT
CURRENT
DATA OUT
ADDRESS
ADDRESS
SUPPLY
DATA I/O
DATA IN
V
CE
OE
CC
CE
WE
[10,11]
[10,12]
PREVIOUS DATA VALID
HIGH IMPEDANCE
t
PU
t
LZCE
t
DATA UNDEFINED
SA
[9,13]
t
t
LZOE
ACE
IL
.
50%
t
t
OHA
DOE
t
AA
t
SCE
t
t
AW
RC
t
WC
4
t
RC
t
HZWE
DATA
t
PWE
t
SD
DATA VALID
IN
VALID
HIGH IMPEDANCE
t
HD
t
DATA VALID
LZWE
t
HA
t
t
HZOE
HZCE
t
PD
50%
CY7C128A
IMPEDANCE
HIGH
C128A–8
C128A–7
C128A–6
ICC
ISB