AD707AR AD [Analog Devices], AD707AR Datasheet - Page 7

• Manufacturer Part Number: AD707AR
• Description: Ultralow Drift Op Amp
• Manufacturer: AD [Analog Devices]

REV. B
18-BIT SETTLING TIME
Figure 22 shows the AD707 settling to within 80 V of its final
value for a 20 V output step in less than 100 s (in the test con-
figuration shown in Figure 23). To achieve settling to 18 bits,
any amplifier specified to have a gain of 4 V/ V would appear to
be good enough, however, this is not the case. In order to truly
achieve 18-bit accuracy, the gain linearity must be better than
4 ppm.
The gain nonlinearity of the AD707 does not contribute to the
error, and the gain itself only contributes 0.1 ppm. The gain
error, along with the V
1 LSB of error in an 18-bit system over the military temperature
range. If calibration is used to null offset errors, the AD707
resolves up to 20 bits at +25 C.
GENERATOR
EQUIVALENT
REFERENCE
DYNAMICS
FLAT-TOP
Figure 23. Op Amp Settling Time Test Circuit
OUTPUT:
50µV/Div
OUTPUT
SIGNAL
10V/Div
ERROR
10V/Div
PULSE
D.U.T.
DATA
5109
OR
Figure 22. 18-Bit Settling
V
IN
10µF
10µF
OS
2k
and V
2k
0.1µF
0.1µF
OS
TIME – 50µs/Div
2
3
2
3
AD707
drift errors do not comprise
1.9k
D.U.T.
OP27
2x HP1N6263
–V
–V
4
4
S
S
+V
+V
200k
7
2k
7
100
S
S
6
6
10µF
10µF
V
0.1µF
0.1µF
ERROR
x 100
–7–
140 dB CMRR INSTRUMENTATION AMPLIFIER
The extremely tight dc specifications of the AD707 enable the
designer to build very high performance, high gain instrumenta-
tion amplifiers without having to select matched op amps for the
crucial first stage. For the second stage, the lowest grade AD707
is ideally suited. The CMRR is typically the same as the high
grade parts, but does not exact a premium for drift performance
(which is less critical in the second stage). Figure 24 shows an
example of the classic instrumentation amp. Figure 25 shows
that the circuit has at least 140 dB of common-mode rejection
for a 10 V common-mode input at a gain of 1001 (R
High CMRR is obtained by first adjusting R
does not change as the input is swept through the full common-
mode range. The value of R
the desired gain. Matched resistors should be used for the
output stage so that R
value Of R
wiper vibrations. To maintain the CMRR at 140 dB over a
20 C range, the resistor ratios in the output stage, R1/R2 and
R3/R4, must track each other better than 10 ppm/ C.
ERROR REFERRED
TO INPUT: 5µV/Div
COMMON-MODE
SIGNAL: 10V/Div
COMMON-MODE
Figure 24. A 3 Op Amp Instrumentation Amplifier
+IN
–IN
INPUT
CM
R
G
Figure 25. Instrumentation Amplifier
Common-Mode Rejection
, the lower the noise introduced by potentiometer
3
2
2
3
A1
A2
AD707
AD707
10k
10k
CM
is as small as possible. The smaller the
6
6
G
, should then be selected to achieve
CIRCUIT GAIN = –––––– + 1
10k
10k
TIME – 2 sec/Div
R1
R2
200
9.9k
R
CM
2
3
20,000
R
CM
A3
10k
G
R4
R2
AD707
until the output
AD707
6
G
= 20 ).
CH1
CH2