S908QC16CDRE FREESCALE [Freescale Semiconductor, Inc], S908QC16CDRE Datasheet - Page 150

• Manufacturer Part Number: S908QC16CDRE
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Enhanced Serial Communications Interface (ESCI) Module
AROVFL— Arbiter Counter Overflow Bit
ARD8— Arbiter Counter MSB
13.9.2 ESCI Arbiter Data Register
ARD7–ARD0 — Arbiter Least Significant Counter Bits
13.9.3 Bit Time Measurement
Two bit time measurement modes, described here, are available according to the state of ACLK.
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1. ACLK = 0 — The counter is clocked with one half of the bus clock. The counter is started when a
2. ACLK = 1 — The counter is clocked with one half of the ESCI input clock generated by the ESCI
This read-only bit indicates an arbiter counter overflow. Clear AROVFL by writing any value to
SCIACTL. Writing 0s to AM1 and AM0 resets the counter keeps it in this idle state.
This read-only bit is the MSB of the 9-bit arbiter counter. Clear ARD8 by writing any value to SCIACTL.
These read-only bits are the eight LSBs of the 9-bit arbiter counter. Clear ARD7–ARD0 by writing any
value to SCIACTL. Writing 0s to AM1 and AM0 permanently resets the counter and keeps it in this idle
state.
1 = Arbiter counter overflow has occurred
0 = No arbiter counter overflow has occurred
falling edge on the RxD pin is detected. The counter will be stopped on the next falling edge. ARUN
is set while the counter is running, AFIN is set on the second falling edge on RxD (for instance, the
counter is stopped). This mode is used to recover the received baud rate. See
prescaler. The counter is started when a 0 is detected on RxD (see
enabling the bit time measurement with ACLK = 1 leads to immediate start of the counter (see
Figure
measure the length of a received break.
13-22). The counter will be stopped on the next rising edge of RxD. This mode is used to
Reset:
RXD
Read:
Write:
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 2
ARD7
Bit 7
0
Figure 13-19. ESCI Arbiter Data Register (SCIADAT)
Figure 13-20. Bit Time Measurement with ACLK = 0
= Unimplemented
ARD6
6
0
ARD5
5
0
ARD4
4
0
ARD3
3
0
MEASURED TIME
ARD2
2
0
Figure
ARD1
1
0
13-21). A 0 on RxD on
Freescale Semiconductor
ARD0
Bit 0
Figure
0
13-20.