SL34119N SLS [System Logic Semiconductor], SL34119N Datasheet
SL34119N
Related parts for SL34119N
SL34119N Summary of contents
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... Low Total Harmonic Distortion Gain Adjustable from < >46 dB for Voice Band Requires Few External Components SIMPLIFIED BLOCK DIAGRAM * = Optional Differential Gain = 2 x System Logic SLS Semiconductor ORDERING INFORMATION Speaker PIN ASSIGNMENT SL34119 SL34119N Plastic SL34119D SOIC for A all packages ...
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SL34119 PIN DESCRIPTION Pin Symbol 1 CD Chip Disable - Digital input. A Logic “0” (<0.8 V) sets normal operation. A Logic “1” ( 2.0 V) sets the power down mode. Input impedance is nominally FC2 ...
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The amount of rejection is a function of the capacitors, and the equivalent impedance looking into FC1 and FC2 (listed in ...
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SL34119 RECOMMENDED OPERATING CONDITIONS Symbol V Supply Voltage CC R Load Impedance L I Peak Load Current L AVD Differential Gain (5.0 KHz bandwidth) VCD Voltage @ CD (Pin 1) T Operating Temperature, All Pakage Types A This device contains ...
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ELECTRICAL CHARACTERISTICS Symbol Parameter AMPLIFIERS (AC CHARACTERISTICS Input Resistance ( Open Loop Gain (Amplifier #1) VOL1 A Closed Loop Gain (Amplifier V2 #2) GBW Gain Bandwidth Product P Output Power OUT3 P OUT12 THD Total Harmonic ...
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SL34119 Figure 3. DEVICE DISSIPATION 16 LOAD Figure 5. DISTORTION versus POWER f = 1.0 kHz, AVD = 34 dB Figure 7. DISTORTION versus POWER 3.0 kHz, AVD = 12 dB Figure 4. DEVICE DISSIPATION 32 LOAD ...