LTC6802-1_1 LINER [Linear Technology], LTC6802-1_1 Datasheet - Page 8

• Manufacturer Part Number: LTC6802-1_1
• Description: Multicell Battery Stack Monitor
• Manufacturer: LINER [Linear Technology]

PIN FUNCTIONS
LTC6802-1
CSBO (Pin 1): Chip Select Output (Active Low). CSBO is
a buffered version of the chip select input, CSBI. CSBO
drives the next IC in the daisy chain. See Serial Port in the
Applications Information section.
SDOI (Pin 2): Serial Data I/O Pin. SDOI transfers data to
and from the next IC in the daisy chain. See Serial Port in
the Applications Information section.
SCKO (Pin 3): Serial Clock Output. SCKO is a buffered ver-
sion of SCKI. SCKO drives the next IC in the daisy chain.
See Serial Port in the Applications Information section.
V
battery stack. Typically V
C12, C11, C10, C9, C8, C7, C6, C5, C4, C3, C2, C1 (Pins
5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27): C1 through
C12 are the inputs for monitoring battery cell voltages.
Up to 12 cells can be monitored. The lowest potential is
tied to pin V
so forth. See the figures in the Applications Information
section for more details on connecting batteries to the
LTC6802-1.
The LTC6802-1 can monitor a series connection of up
to 12 cells. Each cell in a series connection must have
a common mode voltage that is greater than or equal to
the cells below it.
S12, S11, S10, S9, S8, S7, S6, S5, S4, S3, S2, S1 (Pins
6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28): S1 though
S12 pins are used to balance battery cells. If one cell in a
series becomes over charged, an S output can be used to
discharge the cell. Each S output has an internal N-channel
MOSFET for discharging. See the Block Diagram. The NMOS
has a maximum on resistance of 20Ω. An external resistor
should be connected in series with the NMOS to dissipate
heat outside of the LTC6802-1 package. When using the
internal MOSFETs to discharge cells, the die temperature
should be monitored. See Power Dissipation and Thermal
Shutdown in the Applications Information section.
The S pins also feature an internal 10k pull-up resistor. This
allows the S pins to be used to drive the gates of external
P-channel MOSFETs for higher discharge capability.
8
+
(Pin 4): Tie pin 4 to the most positive potential in the
–
. The next lowest potential is tied to C1 and
+
is the same potential as C12.
V
the series of cells.
NC (Pin 30): Pin 30 is internally connected to V
10Ω. Pin 30 can be left unconnected or connected to pin
29 on the PCB.
V
The ADC measures the voltage on V
V
measurements are relative to the V
a simple thermistor and resistor combination connected
to the V
V
V
should be bypassed with a 1μF capacitor. The V
drive a 100k resistive load connected to V
should be buffered with an LT6003 op amp, or similar
device.
V
should be bypassed with a 1μF capacitor. The V
capable of supplying up to 4mA to an external load. The
V
TOS (Pin 35): Top of Stack Input. Tie TOS to V
the LTC6802-1 is the top device in a daisy chain. Tie TOS
to V
chain. When TOS is tied to V
the SDOI input. When TOS is tied to V
expects data to be passed to and from the SDOI pin.
MMB (Pin 36): Monitor Mode (Active Low) Input. When
MMB is low (same potential as V
into monitor mode. See Modes of Operation in the Ap-
plications Information section.
WDTB (Pin 37): Watchdog Timer Output (Active Low). If
there is no activity on the SCKI pin for 2.5 seconds, the
WDTB output is asserted. The WDTB pin is an open drain
NMOS output. When asserted it pulls the output down
to V
state. See Watchdog Timer Circuit in the Applications
Information section.
TEMP1
TEMP
–
–
REF
REG
REG
(Pin 29): Connect V
and stores the result in the TMP registers. The ADC
–
–
(Pin 33): 3.075V Voltage Reference Output. This pin
(Pin 34): Linear Voltage Regulator Output. This pin
pin does not sink current.
when the LTC6802-1 is any other device in a daisy
and resets the configuration register to its default
inputs can also be general purpose ADC inputs.
, V
REF
TEMP2
pin can be used to monitor temperature. The
(Pins 31, 32): Temperature Sensor Inputs.
–
to the most negative potential in
REG
, the LTC6802-1 ignores
REF
–
), the LTC6802-1 goes
TEMPx
pin voltage. Therefore
–
, the LTC6802-1
with respect to
–
. Larger loads
REF
REG
–
REG
through
pin can
pin is
when
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