MBM29F080A-55 FUJITSU [Fujitsu Component Limited.], MBM29F080A-55 Datasheet

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MBM29F080A-55

Manufacturer Part Number
MBM29F080A-55
Description
8M (1M X 8) BIT
Manufacturer
FUJITSU [Fujitsu Component Limited.]
Datasheet
FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
8M (1M
MBM29F080A
Embedded Erase™, Embedded Program™ and ExpressFlash™ are trademarks of Advanced Micro Devices, Inc.
FEATURES
Single 5.0 V read, write, and erase
Minimizes system level power requirements
Compatible with JEDEC-standard commands
Pinout and software compatible with single-power supply Flash
Superior inadvertent write protection
48-pin TSOP(I) (Package Suffix: PFTN-Normal Bend Type, PFTR-Reverse Bend Type)
40-pin TSOP(I) (Package Suffix: PTN-Normal Bend Type, PTR-Reversed Bend Type)
44-pin SOP (Package Suffix: PF)
Minimum 100,000 write/erase cycles
High performance
55 ns maximum access time
Sector erase architecture
Uniform sectors of 64 K bytes each
Any combination of sectors can be erased. Also supports full chip erase.
Embedded Erase™ Algorithms
Automatically pre-programs and erases the chip or any sector
Embedded Program™ Algorithms
Automatically programs and verifies data at specified address
Data Polling and Toggle Bit feature for detection of program or erase cycle completion
Ready/Busy output (RY/BY)
Hardware method for detection of program or erase cycle completion
Low V
Hardware RESET pin
Resets internal state machine to the read mode
Erase Suspend/Resume
Supports reading or programming data to a sector not being erased
Sector group protection
Hardware method that disables any combination of sector groups from write or erase operation (a sector group
consists of 2 adjacent sectors of 64 K bytes each)
Temporary sector groups unprotection
Temporary sector unprotection via the RESET pin
DATA SHEET
CC
write inhibit
3.2 V
-55/-70/-90
8) BIT
DS05-20850-2E

Related parts for MBM29F080A-55

MBM29F080A-55 Summary of contents

Page 1

... FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 8M (1M MBM29F080A FEATURES • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection • 48-pin TSOP(I) (Package Suffix: PFTN-Normal Bend Type, PFTR-Reverse Bend Type) ...

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... MBM29F080A -55/-70/-90 PACKAGE 48-pin plastic TSOP(I) Marking Side (FPT-48P-M19) 40-pin plastic TSOP(I) Marking Side (FPT-40P-M06) 2 48-pin plastic TSOP(I) Marking Side (FPT-48P-M20) 40-pin plastic TSOP(I) Marking Side (FPT-40P-M07) 44-pin plastic SOP (FPT-44P-M16) ...

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... GENERAL DESCRIPTION The MBM29F080A M-bit, 5.0 V-Only Flash memory organized bytes of 8 bits each. The 1 M bytes of data is divided into 16 sectors bytes for flexible erase capability. The 8 bit of data will appear The MBM29F080A is offered in a 48-pin TSOP(I), 40-pin TSOP , and 44-pin SOP packages. This device 7 is designed to be programmed in-system with the standard system 5 ...

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... MBM29F080A -55/-70/-90 FLEXIBLE SECTOR-ERASE ARCHITECTURE • Thirty two 64 K byte sectors • 8 sector groups each of which consists of 2 adjacent sectors in the following pattern; sectors 0-1, 2-3, 4-5, 6-7, 8-9, 10-11, 12-13, and 14-15 • Individual-sector or multiple-sector erase capability • Sector group protection is user-definable 4 0FFFFFH 64 K byte SA15 0EFFFFH 64 K byte ...

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... BLOCK DIAGRAM V RY/ Buffer SS WE State Control RESET Command Register CE OE Low V Detector MBM29F080A MBM29F080A -55 — RY/BY Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer for Address Program/Erase Latch X-Decoder -55/-70/-90 — — ...

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... Side MBM29F080A 37 Standard Pinout FPT-48P-M19 25 26 (Marking Side MBM29F080A 36 Reverse Pinout FPT-48P-M20 N.C. N.C. N.C. N. RY/ ...

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... A 11 RESET 12 N.C. 11 MBM29F080A Reverse Pinout FPT-40P-M07 MBM29F080A -55/-70/-90 SOP 40 N.C. (Top View RY/BY RESET ...

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... WE can Table 1 MBM29F080A Pin Configuration Pin RY/BY Hardware Reset Pin/Sector Protection RESET N. MBM29F080A User Bus Operations ...

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... PFTN DEVICE NUMBER/DESCRIPTION MBM29F080A 8 Mega-bit (1 M 5.0 V-only Read, Write, and Erase 64 K Byte (16 Sectors) MBM29F080A PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package (TSOP) Standard Pinout PFTR = 48-Pin Thin Small Outline Package (TSOP) Reverse Pinout PTN = 40-Pin Thin Small Outline Package ...

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... IL identifier code for MBM29F080A = D5H. These two bytes are given in the table 3. All identifiers for manufactures and device will exhibit odd parity with DQ when executing the Autoselect, A The Autoselect mode also facilitates the determination of sector group protection in the system. By performing ...

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... Table 3 MBM29F080A Sector Protection Verify Autoselect Codes Type Manufacture’ Code Device Code Sector Group Sector Group Protection Addresses * : Outputs 01H at protected sector addresses and outputs 00H at unprotected sector addresses SA0 0 SA1 0 SA2 0 SA3 0 SA4 0 SA5 ...

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... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Group Protection The MBM29F080A features hardware sector group protection. This feature will disable both program and erase operations in any combination of eight sector groups of memory. Each sector group consists of four adjacent sectors grouped in the following pattern: sectors 0-1, 2-3, 4-5, 6-7, 8-9, 10-11, 12-13, and 14-15 (see Table 5) ...

Page 13

... Temporary Sector Group Unprotection This feature allows temporary unprotection of previously protected sector groups of the MBM29F080A device in order to change data. The Sector Group Unprotection mode is activated by setting the RESET pin to high voltage (12 V). During this mode, formerly protected sector groups can be programmed or erased by selecting the sector group addresses ...

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... MBM29F080A -55/-70/-90 Read/Reset Command The read or reset operation is initiated by writing the read/reset command sequence into the command register. Microprocessor read cycles retrieve array data from the memory. The device remains enabled for reads until the command register contents are altered. The device will automatically power-up in the read/reset state. In this case, a command sequence is not required to read data ...

Page 15

... Data polling must be performed at an address within any of the sectors being erased. Figure 17 illustrates the Embedded Erase™ Algorithm using typical command strings and bus operations. MBM29F080A to determine if the 3 , Sector Erase Timer.) Any command other than Sector 3 is “ ...

Page 16

... MBM29F080A -55/-70/-90 Erase Suspend The Erase Suspend command allows the user to interrupt a Sector Erase operation and then perform data reads from or programs to a sector not being erased. This command is applicable ONLY during a Sector Erase operation which includes the time-out period for sector erase. The Erase Suspend command will be ignored if written during the Chip Erase operation or Embedded Program Algorithm ...

Page 17

... DQ 7 Data Polling The MBM29F080A device features Data Polling as a method to indicate to the host that the embedded algorithms are in progress or completed. During the Embedded Program Algorithm, an attempt to read the device will produce the complement of the data last written attempt to read the device will produce the true data last written to DQ Algorithm, an attempt to read the device will produce a “ ...

Page 18

... DQ 6 Toggle Bit I The MBM29F080A also features the “Toggle Bit I” method to indicate to the host system that the embedded algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the device at any address will result in DQ Erase Algorithm cycle is completed, DQ attempts ...

Page 19

... When the device is in the erase 2 mode, DQ toggles if this bit is read from the erasing sector. 2 MBM29F080A 3 prior to and following each subsequent sector erase command toggle during the Embedded Erase™ Algorithm. If ...

Page 20

... RY/BY Ready/Busy The MBM29F080A provides a RY/BY open-drain output pin as a way to indicate to the host system that the Embedded Algorithms are either in progress or has been completed. If the output is low, the device is busy with either a program or erase operation. If the output is high, the device is ready to accept any read/write or erase operation ...

Page 21

... Data Protection The MBM29F080A is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transitions. During power up the device automatically resets the internal state machine in the Read mode. Also, with its control register architecture, alteration of the memory contents only occurs after successful completions of specific multi-bus cycle command sequences ...

Page 22

... MBM29F080A-70/-90.................................................................................... –40°C to +85°C V Supply Voltages......................................................................................... CC MBM29F080A-55.......................................................................................... +4. +5.25 V MBM29F080A-70/-90.................................................................................... +4. +5.50 V Operating ranges define those limits between which the functionality of the device is guaranteed. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges ...

Page 23

... Figure +2.0 V Figure 2 +14.0 V +13 +0 Note: This waveform is applied for A 9 Figure 3 MBM29F080A Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform OE, and RESET. Maximum Positive Overshoot Waveform 2 -55/-70/-90 23 ...

Page 24

... MBM29F080A -55/-70/-90 DC CHARACTERISTICS Parameter Parameter Description Symbol I Input Leakage Current LI I Output Leakage Current OE, RESET Inputs Leakage 9 I LIT Current I V Active Current (Note 1) CC1 Active Current (Note 2) CC2 Current (Standby) CC3 Current (Standby, Reset) CC4 CC V Input Low Level ...

Page 25

... READY Note: 1. Test Conditions: Output Load: 1 TTL gate and 30 pF Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output: 1.5 V Device Under Test Notes: 1. MBM29F080A-55 MBM29F080A-70/-90: C MBM29F080A Test Setup — Min Max Max ...

Page 26

... Read Min. Toggle Bit I and Data Polling Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Typ. Typ. Max. Min. Min. ID Min. Min. Min. Min. Min. MBM29F080A Unit -55 -70 - ...

Page 27

... RESET Hold Time Before Read RH — t Program/Erase Valid to RY/BY Delay BUSY — t EOE Notes: 1. This does not include the preprogramming time. 2. This timing is for Sector Protection operation. MBM29F080A Description Min. Min. Max. Max. -55/-70/-90 MBM29F080A Unit -55 -70 -90 500 500 500 ...

Page 28

... MBM29F080A -55/-70/-90 SWITCHING WAVEFORMS • Key to Switching Waveforms Addresses Figure 5.1 AC Waveforms for Read Operations 28 WAVEFORM INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” ...

Page 29

... Addresses t RH RESET High Figure 5.2 AC Waveforms for Read Operations MBM29F080A t RC Addresses Stable t ACC Output Valid -55/-70/- ...

Page 30

... MBM29F080A -55/-70/-90 3rd Bus Cycle Addresses 555H GHWL WPH t CS A0H Data t DS 5.0 V Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device. ...

Page 31

... D is the output of the data written to the device. OUT 5. Figure indicates last two bus cycles of four bus cycle sequence. Figure 7 AC Waveforms for Alternate CE Controlled Program Operations MBM29F080A Data Polling ...

Page 32

... MBM29F080A -55/-70/-90 Addresses GHWL WE Data t VCS the sector address for Sector Erase. Addresses = 555H for Chip Erase. Figure 8 32 555H 2AAH 555H WPH AAH 55H 80H AC Waveforms Chip/Sector Erase Operations ...

Page 33

... AC Waveforms for Data Polling During Embedded Algorithm Operations CE t OEH WE t OES OE Data Toggle stops toggling (The device has completed the Embedded operation.) 6 Figure 10 AC Waveforms for Toggle Bit I during Embedded Algorithm Operations MBM29F080A Valid Data t EOE t WHWH1 ...

Page 34

... MBM29F080A -55/-70/- RY/BY Figure 11 RY/BY Timing Diagram During Program/Erase Operations WE RESET RY/BY 34 The rising edge of the last WE signal READY Figure 12 RESET, RY/BY Timing Diagram Entire programming or erase operations t BUSY t RB ...

Page 35

... VLHT WE t CSP CE Data t VCS V CC SGAx = Sector Group Address for initial sector SGAy = Sector Group Address for next sector Figure 13 AC Waveforms for Sector Group Protection Timing Diagram MBM29F080A VLHT OESP WPP t VLHT -55/-70/-90 SGAy 01H ...

Page 36

... MBM29F080A -55/-70/- VIDR t VCS RESET CE WE RY/BY Figure 14 Enter Erase Embedded Suspend Erasing WE Erase Toggle DQ and with OE Note read from the erase-suspended sector Program or Erase Command Sequence VLHT Unprotection period Temporary Sector Group Unprotection Timing Diagram ...

Page 37

... EMBEDDED ALGORITHMS Increment Address Figure 16 MBM29F080A Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence (Address/Command): 555H/AAH 2AAH/55H 555H/A0H Program Address/Program Data Embedded Program TM Algorithm -55/-70/-90 37 ...

Page 38

... MBM29F080A -55/-70/-90 Chip Erase Command Sequence (Address/Command): 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H 555H/10H Note: To insure the command has been accepted, the system software should check the status of DQ prior to and following each subsequent sector erase command the second status check, the command may not have been accepted. ...

Page 39

... Addr Read Byte (DQ Addr Note rechecked even Figure 18 MBM29F080A Start VA = Address for programming Any of the sector addresses within the sector being erased during sector erase or multiple Yes erases operation. = Data Any of the sector group ...

Page 40

... MBM29F080A -55/-70/-90 Note rechecked even changing to “1”. 40 Start Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Yes Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Fail Pass = “1” because DQ ...

Page 41

... PLSCNT = 25? Data = 01H? Yes Remove V from A Protect Another Sector ID 9 Write Reset Command Remove V Device Failed Write Reset Command Sector Protection Figure 20 Sector Group Protection Algorithm MBM29F080A -55/-70/-90 Start ) RESET = IH, ...

Page 42

... MBM29F080A -55/-70/-90 Notes: 1. All Protected sector groups unprotected. 2. All previously protected sector groups are protected once again. Figure 21 42 Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector Group Unprotection Completed (Note 2) Temporary Sector Group Unprotection Algorithm ...

Page 43

... SOP PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Notes: 1. Sampled, not 100% tested. 2. Test conditions T = 25° 1.0 MHz A MBM29F080A Limits Unit Typ. Max. — sec — 8 150 — 8.4 20 sec — — ...

Page 44

... MBM29F080A -55/-70/-90 PACKAGE DIMENSIONS 48-pin plastic TSOP(I) (FPT-48P-M19) LEAD No. 1 INDEX 24 20.00±0.20 (.787±.008) * 18.40±0.20 (.724±.008) 0.10(.004) 19.00±0.20 (.748±.008) 1996 FUJITSU LIMITED F48029S-2C-2 C 48-pin plastic TSOP(I) (FPT-48P-M20) LEAD No. 1 INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) 18.40±0.20 * (.724±.008) 20.00± ...

Page 45

... FUJITSU LIMITED F40008S-1C-1 C MBM29F080A * Resin Protrusion. (Each Side: 0.15 (.006)Max) Details of "A" part 40 "A" 0.15(.006) 0.25(.010) 21 10.00±0.20 (.394±.008) 0.50(.0197) TYP 9 ...

Page 46

... MBM29F080A -55/-70/-90 (Continued) 44-pin plastic SOP (FPT-44P-M16) 28.45 44 INDEX LEAD No. 1 1.27(.050)TYP 0.10(.004) 26.67(1.050)REF 1995 FUJITSU LIMITED F44023S-3C +0.25 +.010 1.120 −0.20 −.008 23 13.00±0.10 (.512±.004) "A" 22 +0.10 0.40 0.05(.002)MIN −0.05 Ø0.13(.005) M +.004 (Stand off) .016 (STAND OFF) −.002 2.50(.098)MAX ...

Page 47

... Tel: (65) 281-0770 Fax: (65) 281-0220 http://www.fmap.com.sg/ F9811 FUJITSU LIMITED Printed in Japan MBM29F080A All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use ...

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