PALCE20V8-10DMB Cypress Semiconductor, PALCE20V8-10DMB Datasheet - Page 7

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PALCE20V8-10DMB

Manufacturer Part Number
PALCE20V8-10DMB
Description
Flash Erasable/ Reprogrammable CMOS PAL Device
Manufacturer
Cypress Semiconductor
Datasheet
Military Switching Characteristics
Shaded area contains preliminary information.
Document #: 38-03026 Rev. **
t
t
t
t
t
t
t
t
t
t
t
f
f
f
t
t
PD
PZX
PXZ
EA
ER
CO
S
H
P
WH
WL
MAX1
MAX2
MAX3
CF
PR
Parameter
Input to Output
Propagation Delay
OE to Output Enable
OE to Output Disable
Input to Output Enable Delay
Input to Output Disable Delay
Clock to Output Delay
Input or Feedback Set-Up Time
Input Hold Time
External Clock Period (t
Clock Width HIGH
Clock Width LOW
External Maximum Frequency
(1/(t
Data Path Maximum Frequency
(1/(t
Internal Feedback Maximum
Frequency (1/(t
Register Clock to
Feedback Input
Power-Up Reset Time
CO
WH
+ t
+ t
S
WL
)
[7,10]
Description
))
[7, 11 ]
CF
[7, 13]
[7]
+ t
[7]
[8]
S
))
[2]
[8]
[7]
[7,12]
CO
+ t
[7]
S
[7,9]
)
Min.
62.5
62.5
10
20
50
1
1
0
8
8
1
20V8 10
Max.
10
10
10
10
10
10
6
Min.
41.7
12
24
10
10
50
50
1
1
0
1
20V8 15
Max.
15
15
15
15
15
12
8
Min.
33.3
33.3
20
40
15
15
25
1
1
0
1
20V8 25
PALCE20V8
Max.
25
20
20
25
25
20
10
Page 7 of 14
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s

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