ADE7759 Analog Devices, ADE7759 Datasheet - Page 28

• Manufacturer Part Number: ADE7759
• Description: Active Energy Metering IC with di/dt Sensor Interface
• Manufacturer: Analog Devices

ADE7759
CHECKSUM REGISTER
The ADE7759 has a Checksum register (CHKSUM[5:0]) to
ensure the data bits received in the last serial read operation are
not corrupted. The 6-bit Checksum register is reset before the
first bit (MSB of the register to be read) is put on the DOUT
pin. During a serial read operation, when each data bit becomes
available on the rising edge of SCLK, the bit will be added to
the Checksum register. In the end of the serial read operation,
the content of the Checksum register will be the sum of all the ones
contained in the register previously read. Using the Checksum
register, the user can determine if an error has occurred during
the last read operation.
Address
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
Name
WAVEFORM
AENERGY
RSTENERGY
STATUS
RSTSTATUS
MODE
CFDEN
CH1OS
CH2OS
GAIN
APGAIN
PHCAL
APOS
R/W # of Bits
R
R
R
R
R
R/W 16
R/W 12
R/W 8
R/W 6
R/W 8
R/W 12
R/W 8
R/W 16
40
8
24/40
40
8
Default
0h
0h
0h
40h
0h
000Ch
3Fh
80h
0h
0h
0h
0h
0h
Table IV. Register List
The Waveform register is a read-only register. This register contains
Same as the Active Energy Register except that the register is reset to 0
Interrupt Status Register. This is an 8-bit read-only register. The status
Same as the Interrupt Status Register except that the register contents
The Mode Register. This is a 16-bit register through which most of the
CF Frequency Divider Denominator Register. The output frequency
PGA Gain Adjust. This 8-bit register is used to adjust the gain selec-
Active Power Gain Adjust. This is a 12-bit register. The Active Power
Active Power Offset Correction. This 16-bit register allows small off-
Description
the sampled waveform data from Channel 1, Channel 2, or the Active
Power signal. The data source and the length of the Waveform regis-
ters are selected by data bits 14 and 13 in the Mode Register—see
Channel 1 and 2 Sampling section.
The Active Energy Register. Active Power is accumulated (Integrated)
over time in this 40-bit, read-only register. The energy register can hold
a minimum of 11.53 seconds of Active Energy information with full-
scale analog inputs before it overflows—see Energy Calculation section.
following a read operation.
register contains information regarding the source of ADE7759 inter-
rupts—see Interrupts section.
are reset to 0 (all flags cleared) after a read operation.
ADE7759 functionality is accessed. Signal sample rates, filter enabling
and calibration modes are selected by writing to this register. The
contents may be read at any time—see Mode Register section.
on the CF pin is adjusted by writing to this 12-bit read/write register—
see Energy-to-Frequency Conversion section.
Channel 1 Offset Adjust. The MSB is used to enable the digital integra-
tor. Bit 6 is not used. Writing to Bit 0 to 5 allows offsets on Channel 1
to be removed—see Analog Inputs section and CH1OS Register section.
Channel 2 Offset Adjust. Writing to this 6-bit register allows any offsets
on Channel 2 to be removed—see Analog Inputs section.
tion for the PGA in Channel 1 and 2—see Analog Inputs section.
calculation can be calibrated by writing to this register. The calibration
range is ±50% of the nominal full-scale active power. The resolution of the
gain adjust is 0.0244%/LSB—see Channel 1 ADC Gain Adjust section.
Phase Calibration Register. The phase relationship between Channel 1
and Channel 2 can be adjusted by writing to this 8-bit register. The
valid content of this two’s complement register is between 9Eh and
5Ch, which is a phase difference of –2.365° to +2.221° at 60 Hz in
0.0241° steps—see Phase Compensation section.
sets in the Active Power calculation to be removed—see Active Power
Calculation section.
Note that a read to the CHKSUM register will also generate a
checksum of the CHKSUM register itself.
DOUT
+
+
CONTENT OF REGISTER (n-bytes)
CHECKSUM REGISTER ADDR: 1Eh