ADE7757 Analog Devices, ADE7757 Datasheet - Page 10
ADE7757
Manufacturer Part Number
ADE7757
Description
Energy Metering IC with Integrated Oscillator
Manufacturer
Analog Devices
Datasheet
1.ADE7757.pdf
(14 pages)
Available stocks
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Part Number
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Part Number:
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Manufacturer:
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Quantity:
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The ADE7757 contains an on-chip power supply monitor.
The power supply (V
ADE7757. If the supply is less than 4 V, the ADE7757
will reset. This is useful to ensure proper device operation
at power-up and power-down. The power supply monitor
has built in hysteresis and filtering that provide a high
degree of immunity to false triggering from noisy sup-
plies.
As can be seen from Figure 17, the trigger level is nomi-
nally set at 4 V. The tolerance on this trigger level is
within ±5%. The power supply and decoupling for the
part should be such that the ripple at V
5 V ± 5% as specified for normal operation.
Figure 18 illustrates the effect of offsets on the real power cal-
culation. As can be seen, offsets on Channel V1 and Channel
V2 will contribute a dc component after multiplication. Since
this dc component is extracted by the LPF and used to gener-
ate the real power information, the offsets will contribute a
constant error to the real power calculation. This problem is
easily avoided by the built-in HPF in Channel V1. By removing
the offsets from at least one channel, no error component can
be generated at dc by the multiplication. Error terms at the line
frequency (
frequency conversion—see Digital-to-Frequency Con
sion.
sion.
sion.
sion.
sion.
The equation below shows how power calculation is affected by
the dc offsets in the current and voltage channels:
V
Vcos(
2
V
2
ACTIVATION INACTIVE
I
INTERNAL
I
V
t)
V
os
cos(
DD
5V
4V
0V
are removed by the LPF and the digital-to-
V
I
2
os
os
) t
V
DD
I
os
cos(
) is continuously monitored by the
I
cos(
ACTIVE
) t
Digital-to-Frequency Con
Digital-to-Frequency Con
Digital-to-Frequency Con
Digital-to-Frequency Conver-
TIME
PRELIMINARY TECHNICAL DATA
I
) t
os
I
os
INACTIVE
DD
V
cos(
does not exceed
) t
ver-
ver-
ver-
ver-
–10–
The HPF in Channel V1 has an associated phase response
that is compensated for on-chip. Figures 19 and 20 show
the phase error between channels with the compensation
network activated. The ADE7757 is phase compensated up
to 1 kHz as shown. This will ensure correct active har-
monic power calculation even at low power factors.
-0.05
-0.10
-0.05
-0.10
0.30
0.25
0.20
0.15
0.10
0.05
0.30
0.25
0.20
0.15
0.10
0.05
V
os
0
0
V
40
0
I
2
os
I
0
100
45
DC COMPONENT (INCLUDING ERROR TERM) IS
EXTRACTED BY THE LPF FOR REAL POWER CALCULATION
200
300
V
I
os
FREQUENCY - Rad/s
os
50
V
I
FREQUENCY - Hz
FREQUENCY - Hz
400
500
55
600
60
700
800
65
900 1000
REV. PrC.
70