SAA7390GP Philips Semiconductors, SAA7390GP Datasheet - Page 26
SAA7390GP
Manufacturer Part Number
SAA7390GP
Description
High performance Compact Disc-Recordable CD-R controller
Manufacturer
Philips Semiconductors
Datasheet
1.SAA7390GP.pdf
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Philips Semiconductors
Table 22 GPIOCTL field descriptions
9.1
This section describes the registers used for the S2B UART control.
Table 23 S2B UART transmit, receive and status buffer: 0xF0A1, F0A2 and F0A3; note 1
Note
1. WTS2B is for the transmit data byte from the S2B UART and RDS2B is for the receive data byte from the S2B UART.
Table 24 S2BSTAT field descriptions
1996 Jul 02
MNEMONIC
S2BSTAT
OVRRUN
High performance Compact
Disc-Recordable (CD-R) controller
RXDRDY
TXDRDY
GPDAT1
GPDAT2
GPDAT3
GPDAT4
GPDIR1
GPDIR2
GPDIR3
GPDIR4
WTS2B
RDS2B
FIELD
FIELD
PE
S2B UART registers
General purpose bit direction control. Default LOW puts GPIO1 into the input mode, setting this HIGH
puts GPIO1 in output mode.
GPIO1 data bit.
General purpose bit direction control. Default LOW puts GPIO2 into the input mode, setting this HIGH
puts GPIO2 in output mode.
GPIO2 data bit.
General purpose bit direction control. Default LOW puts GPIO3 into the input mode, setting this HIGH
puts GPIO3 in output mode.
GPIO3 data bit.
General purpose bit direction control. Default LOW puts GPIO4 into the input mode, setting this HIGH
puts GPIO4 in output mode.
GPIO4 data bit.
logic 1 indicates that the receive data is valid
logic 1 indicates that the data in the receive buffer was not read before it was over written by the next
byte
logic 1 indicates that a parity error was detected in the receive data byte; this is usually caused by the
wrong baud rate
logic 1 indicates that the transmit data buffer is empty and ready for another byte
R/W
W
R
R
DATA7
DATA7
7
DATA6
DATA6
6
DATA5
DATA5
5
26
DESCRIPTION
DESCRIPTION
DATA4
DATA4
4
DATA BYTE
TXDRDY
DATA3
DATA3
3
DATA2
DATA2
PE
2
Preliminary specification
OVRRUN RXDRDY
DATA1
DATA1
1
SAA7390
DATA0
DATA0
0
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