SAA7371GP Philips Semiconductors, SAA7371GP Datasheet - Page 18

• Manufacturer Part Number: SAA7371GP
• Description: Digital servo processor and Compact Disc decoder CD7
• Manufacturer: Philips Semiconductors

Philips Semiconductors
7.9
The bi-phase mark digital output signal at pin DOBM is in
accordance with the format defined by the IEC958
specification. Three different modes can be selected via
register A;
Table 5 Format
Table 6 Description of Table 5
1998 Jul 06
Sync
Auxiliary
Error flags
Audio sample
Validity flag
User data
Channel status
Parity bit
Sync
Audio sample
Validity flag
User data
Channel status
DOBM pin held LOW.
Data taken before concealment, mute and fade (must
always be used for CD ROM modes).
Data taken after concealment, mute and fade.
Digital servo processor and
Compact Disc decoder (CD7)
FUNCTION
FUNCTION
EBU interface
The sync word is formed by violation of the bi-phase rule and therefore does not contain any data.
Its length is equivalent to 4 data bits. The 3 different sync patterns indicate the following situations:
sync B: start of a block (384 words), word contains left sample; sync M: word contains left sample
(no block start) and sync W: word contains right sample.
Left and right samples are transmitted alternately.
Audio samples are flagged (bit 28 = 1) if an error has been detected but was uncorrectable.
This flag remains the same even if data is taken after concealment.
Subcode bits Q-to-W from the subcode section are transmitted via the user data bit.
This data is asynchronous with the block rate.
The channel status bit is the same for left and right words. Therefore a block of 384 words contains
192 channel status bits. The category code is always CD. The bit assignment is given in Table 7.
8 to 27
0 to 3
4 to 7
BITS
28
29
30
31
4
not used; normally zero
CFLG error and interpolation flags when selected by register A
first 4 bits not used (always zero). 2’s compliment. LSB = bit 12, MSB = bit 27
valid = logic 0
used for subcode data (Q-to-W)
control bits and category code
even parity for bits 4 to 30
18
DESCRIPTION
7.9.1
The digital audio output consists of 32-bit words
(‘subframes’) transmitted in bi-phase mark code (two
transitions for a logic 1 and one transition for a logic 0).
Words are transmitted in blocks of 384.Table 5 gives the
formats.
DESCRIPTION
F
ORMAT
Product specification
SAA7371