SAA7201H Philips Semiconductors, SAA7201H Datasheet - Page 3

• Manufacturer Part Number: SAA7201H
• Description: Integrated MPEG2 AVG decoder
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Graphics
1997 Jan 29
Flexible horizontal continuous scaling from 0.5 up to 4
allows easy aspect ratio conversion including support
for 2.21 : 1 aspect ratio movies
Vertical scaling with fixed factors 0.5, 1 or 2 to support
picture scaling and up-sampling
Scaling of incoming pictures to 25% of their original size
with anti-aliasing filtering to free screen space for
graphics applications like electronic program guides
Non-full screen MPEG pictures will be displayed in a box
of which position and background colour are adjustable
by the external CPU
Video output may be slaved to internally (master)
generated or externally (slave) supplied HV
synchronization signals; the position of active video is
programmable; MPEG timebase changes do not
affected the display phase
Video output direct connectable to SAA718X encoder
family
Various trick modes under control of external CPU:
– Freeze I or P pictures; restart on I picture
– Freeze on B pictures; restart at any moment
– Scanning and decoding of I or I and P pictures
– Single step mode
– Repeat/Skip field for time base correction.
Graphics is region based and presented in boxes
independent of video format
Screen arrangement of boxes is determined by display
list mechanism which allows for multiple boxes,
background loading, fast switching, scrolling and fading
of regions
Integrated MPEG2 AVG decoder
3
Support of 2, 4, 8 bits/pixel bit-maps in fixed bit-maps or
coded in accordance to the DVB variable/run length
standard for region bases graphics
Optimized memory control in MPEG video decoding
allows for storage of graphical bit-maps up to 1.2 Mbit in
50 Hz and 2.0 Mbit in 60 Hz systems
VL/RL encoding enables full screen graphics at
8 bit/pixel in 50 Hz
Fast CPU access enables full bit-map updates within a
display field period
Display colours are obtained via colour look-up tables;
CLUT output is YUVT at 8-bit for each signal component
thus enabling 16M different colours and 6-bit for T
(transparency) which gives 64 mixing levels with video
Bit-map table mechanism to specify a sub-set of entries
if the CLUT is larger than required by the coded bit
pattern; supported bit-map tables are 16 to 256,
4 to 256 and 4 to 16
Graphics boxes may not overlap vertically; if 256 entry
CLUT has to be down loaded, a vertical separation of
1 field line is mandatory
Internal support for fast block moves in the external
SDRAM during MPEG decoding
Graphics mechanism can be used for signal generation
in the vertical blanking interval; useful for teletext, wide
screen signalling, closed caption etc.
Support for a single down-loadable cursor of 1 kpixel
with programmable shape; supported shapes are
8
Cursor colours are determined via a 4-entry CLUT with
YUVT at 6, 4, 4 respectively 2 bits; mixing of cursor with
video + graphics in 4 levels
Cursor can be moved freely across the screen without
overlapping restrictions.
128, 16
64, 32
32, 64
16 and 128
Objective specification
SAA7201
8