SAA7151 Philips Semiconductors, SAA7151 Datasheet - Page 7

• Manufacturer Part Number: SAA7151
• Description: Digital multistandard colour decoder with SCART interface DMSD2-SCART
• Manufacturer: Philips Semiconductors

Philips Semiconductors
The multipliers operate as a quadrature demodulator for all
PAL and NTSC signals; it operates as a frequency
down-mixer for SECAM signals.
The two multiplier output signals are converted to a serial
UV data stream and applied to two low-pass filter stages,
then to a gain controlled amplifier. A final multiplexed
low-pass filter achieves, together with the preceding
stages, the required bandwidth performance. The from
PAL and NTSC originated signals are applied to a
comb-filter. The signals, originated from SECAM, are fed
through a cloche filter (0 Hz centre frequency), a phase
demodulator and a differentiator to obtain
frequency-demodulated colour-difference signals.
The SECAM signals are fed after de-emphasis to a
cross-over switch, to provide the both serial-transmitted
colour-difference signals. These signals are finally fed via
April 1993
handbook, full pagewidth
Digital multistandard colour decoder with
SCART interface (DMSD2-SCART)
CVBS
Y/C
C
Y
FS
G
R
B
sync
I C-bus
(select)
2
TDA8540
SWITCH
VIDEO
*
(UV are switched inside SAA7151B)
fast switching of Y signal for insertion
Fig.3 System configuration, RGB fast switch interface included (SCART).
CVBS/Y
CVBS/Y/sync
chroma
sync
BP
sync
C
R
G
B
HCL
CPI
TDA8446
SWITCH AND
SW1
MATRIX
VIDEO
SW2
C
7
FS
the fast switch to the output formatter stages and to the
output interface.
Chrominance signals are output in parallel (4:2:2) on the
YUV-bus. The data rate of Y signal (pixel rate) is
13.5 MHz. UV signals have a data rate of 13.5 MHz/2 for
the 4:2.2 format (Table 2) respectively 13.5 MHz/4 for the
4:1.1 format (Table 3).
Component processing and SCART interface control
The 8-bit multiplexed colour-difference input signal (signal
CUV, Fig.1, out of matrixed RGB in Fig.3) is fed via the
input interface to a chrominance stop filter (UV signal only
can pass through; Figures 22 to 24). Here it is clamped
and fed to the offset compensation which can be enabled
or disabled via the I
*
FSO
U
CSO
CPO
MULTIPLEXER
HCT4053
Y
LP
V
U/V
+
LP
LP
V2
V0
GPSW1
ADI
AO
AO
2
ADI
from SCART interface SAA7151B
C-bus.
S0 S1
TDA8709A
TDA8708A
(CHROMINANCE)
and multiplexer
(LUMINANCE)
+5 V
8-bit ADC
8-bit ADC
FE
CLS CLP
GA GB
clamping
Product specification
MEH305-3
CLK
SAA7151B
CLK
GPSW2
CVBS(7-0)
GPSW1
FSI
CUV(7-0)
MUXC
CPI