DAC8512GBC Analog Devices, DAC8512GBC Datasheet - Page 18

• Manufacturer Part Number: DAC8512GBC
• Description: % V/ Serial Input Complete 12-Bit DAC
• Manufacturer: Analog Devices

DAC8512
*
PORTC
*
DDRC
PORTD
*
DDRD
SPCR
*
SPSR
*
SPDR
*
* SDI RAM variables:
*
*
*
*
SDI1
SDI2
*
INIT
*
*
*
*
*
*
*
UPDATE
*
*
*
*
*
*
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
ORG
LDS
LDAA
STAA
LDAA
STAA
LDAA
STAA
LDAA
STAA
LDAA
STAA
BSR
JMP
PSHX
PSHY
PSHA
LDAA
STAA
LDAA
STAA
LDX
LDY
BCLR
BSET
BCLR
$1003
$1007
$1008
$1009
$1028
$1029
$102A
$00
$01
$C000
#$CFFF
#$03
PORTC
#$03
DDRC
#$30
PORTD
#$38
DDRD
#$5F
SPCR
UPDATE
$E000
#$0A
SDI1
#$AA
SDI2
#SDI1
#$1000
PORTC,Y
DAC8512–M68HC11 Interface Program Source Code
PORTC,Y
PORTC,Y
Port C control register
“0,0,0,0;0,0,CLR/,CS/”
Port C data direction
Port D data register
“0,0,LD/,SCLK;SDI,0,0,0
Port D data direction
SPI control register
“SPIE,SPE,DWOM,MSTR;CPOL,CPHA,SPRl,SPR0”
SPI status register
“SPIF,WCOL,0,MODF;0,0,0,0”
SPI data register; Read-Buffer; Write-Shifter
SDI1 is encoded from 0 (Hex) to F (Hex)
SDI2 is encoded from 00 (Hex) to FF (Hex)
DAC requires two 8-bit loads; upper 4 bits of SDI1
are ignored.
SDI packed byte 1 “0,0,0,0;MSB,DB10,DB9,DB8”
SDI packed byte 2 “DB7,DB6,DB5,DB4;DB3,DB2,DB1,DB0”
Start of user’s RAM in EVB
Top of C page RAM
0,0,0,0;0,0,1,1
CLR/-Hi, CS/-Hi
Initialize Port C Outputs
0,0,0,0;0,0,1,1
CLR/ and CS/ are now enabled as outputs
0,0,1,1;0,0,0,0
LDI-Hi,SCLK-Hi,SDI-Lo
Initialize Port D Outputs
0,0,1,1;1,0,0,0
LD/,SCLK, and SDI are now enabled as outputs
SPI is Master,CPHA=1,CPOL=1,Clk rate=E/32
Xfer 2 8-bit words to DAC8512
Restart BUFFALO
Save registers X, Y, and A
0,0,0,0;1,0,1,0
SDI1 is set to 0A (Hex)
1,0,1,0;1,0,1,0
SDI2 is set to AA (Hex)
Stack pointer at 1st byte to send via SDI
Stack pointer at on-chip registers
$02 Assert CLR/
$02 De-assert CLR/
$01 Assert CS/
–18–
REV. A