AD5251 Analog Devices, AD5251 Datasheet - Page 9

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AD5251

Manufacturer Part Number
AD5251
Description
(AD5251 / AD5252) Dual 64-and 256-Position I2C Nonvolatile Memory Digital Potentiometers
Manufacturer
Analog Devices
Datasheet

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PIN CONFIGURATION AND FUNCTION DESCRIPTION
Table 5. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
I
2
For quad-channel device software compatibility, the dual potentiometers in the parts are designated as RDAC1 and RDAC3.
C INTERFACE TIMING DIAGRAM
SDA
SCL
Mnemonic
V
AD0
WP
W1
B1
A1
SDA
V
SCL
DGND
AD1
A3
B3
W3
DD
SS
P
t
1
Description
Positive Power Supply Pin. Connect +2.7 V to +5 V for single supply or ±2.7 V for dual supply,
where V
EEMEM.
I
Write Protect, Active Low. V
Wiper Terminal of RDAC1. V
B Terminal of RDAC1. V
A Terminal of RDAC1. V
Serial Data Input/Output Pin. Shifts in one bit at a time on positive clock edges. MSB loaded
first. Open-drain MOSFET requires pull-up resistor.
Negative Supply. Connect to 0 V for single supply or –2.7 V for dual supply, where V
+5.5 V. If V
26 ms when storing data to EEMEM.
Serial Input Register Clock Pin. Shifts in one bit at a time on positive clock edges. V
Digital Ground. Connect to system analog ground at a single point.
I
A Terminal of RDAC3. V
B Terminal of RDAC3. V
W Terminal of RDAC3. V
(V
2
2
C Device Address 0. AD0 and AD1 allow four AD5251/AD5252s to be addressed.
C Device Address 1. AD0 and AD1 allow four AD5251/AD5252s to be addressed.
S
DD
+ 0.3 V). Pull-up resistor is recommended for SCL to ensure minimum power.
t
2
DD
SS
– V
is used, other than grounded, in dual supply, V
t
3
SS
≤ 5.5 V. V
t
8
t
8
Figure 2. AD5251/AD5252 in TSSOP-14
SS
SS
SS
SS
t
SDA
AD0
SS
9
V
WP
W1
DD
B1
A1
≤ V
≤ V
DD
≤ V
≤ V
≤ V
must be able to source 35 mA for 26 ms when storing data to
Figure 3. I
WP
SS
B1
B3
A1
A3
1
2
3
4
5
6
7
W3
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
Rev. 0 | Page 9 of 28
(Not to Scale)
≤ V
W1
AD5251/
AD5252
TOP VIEW
DD
DD
DD
DD
DD
t
≤ V
2
.
.
9
DD
+ 0.3 V.
.
.
t
1
1
C Timing Diagram
1
1
4
.
1
DD
.
1
14
13
12
11
10
9
8
W3
B3
A3
AD1
DGND
SCL
V
SS
t
5
SS
t
must be able to sink 35 mA for
7
t
6
SCL
DD
AD5251/AD5252
– V
P
SS
t
10

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