ADV7160 Analog Devices, ADV7160 Datasheet - Page 21
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ADV7160
Manufacturer Part Number
ADV7160
Description
96-Bit/ 220 MHz True-Color Video RAM-DAC
Manufacturer
Analog Devices
Datasheet
1.ADV7160.pdf
(44 pages)
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REV. 0
Figure 29. 16-Bit True-Color in Bypass Mode using R7–R0
and G7–G0
Fiigure 30. 15-Bit True-Color in Bypass Mode using R6–R0
and G7–G0
PIXEL
INPUT
DATA
PIXEL
INPUT
DATA
R9
R8
R7
R6
R5
G9
G8
G7
G6
G5
B9
B8
B7
B6
B5
R9
R8
R7
R6
R5
G9
G8
G7
G6
G5
B9
B8
B7
B6
B5
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
ASSIGN-
ASSIGN-
MENTS
MENTS
PIN
PIN
B3
B2
B1
B0
R7
R6
R5
R4
R3
R2
R1
R0
G7
G6
G5
G4
G3
G2
G1
G0
B7
B6
B5
B4
B3
B2
B1
B0
R7
R6
R5
R4
R3
R2
R1
R0
G7
G6
G5
G4
G3
G2
G1
G0
B7
B6
B5
B4
PIXEL PORT
PIXEL PORT
LATCHED
LATCHED
DATA
DATA
G7
G5
G4
G3
G2
R6
R2
R0
G7
G6
G5
G4
G3
G2
G1
G0
R6
R5
R4
R3
R2
R1
R0
G7
G6
G1
G0
R5
R4
R3
R1
TO
x
x
TO
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
DATA LATCHED
TO DAC INPUTS
DATA LATCHED
TO DAC INPUTS
G9
G8
G7
G6
G5
G4
R9
R8
R7
R6
G9
G8
G7
G6
G5
B9
B8
B7
B6
B5
R9
R8
R7
R6
R5
B9
B8
B7
B6
B5
R5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RED
DAC
RED
DAC
GREEN
DAC
BLUE
DAC
GREEN
DAC
BLUE
DAC
IOG
IOB
IOG
IOB
IOR
IOR
–21–
In 15-bit Palette Bypass Mode, the color channels bypass the
Pixel Mask and the Color Palette. The 7 bits of red pixel data
and 8 bits of green pixel data are mapped onto the 5 MSBs of
the red, green and blue DAC input as shown in Figure 30. The
remaining LSBs on each DAC are zeros. The Bypass Mode can
be selected in two ways, by using CR27–CR24 of Command
Register 2 or on a pixel by pixel basis using the PS inputs
(ADV7160 only).
Multiplexing
The on-board multiplexers of the ADV7160/ADV7162 elimi-
nate the need for external data serializer circuits. Multiple video
memory devices can be connected, in parallel, directly to the de-
vice. Figure 31 shows four memory banks of 50 MHz memory
connected to the ADV7160, running in 4:1 multiplex mode,
giving a resultant pixel or dot clock rate of 200 MHz. Instead of
having to provide a new pixel at the input every 5 ns, four pixels
are provided together every 20 ns. The input multiplexer takes
the four pixels latched in parallel, and selects them one at a time
to produce a pixel stream at the pixel clock rate. In 4:1 mode,
the pixels are selected in the sequence A, B, C, D, cycling continu-
ously. In 2:1 mode, the A and B pixels are selected. The 8:1
mode is only available in 8-bit Pseudo-Color Mode. BLANK,
SYNC, ODD/EVEN and TRISYNC are not multiplexed and
can only change on a 1, 2, 4 or 8 pixel boundary depending on
the multiplex mode.
On the rising edge of LOADIN, all the pixel port inputs are
latched into the ADV7160/ADV7162. The LOADIN frequency
must be a divided down frequency of the pixel clock frequency.
This can be achieved using LOADOUT to directly drive
LOADIN as LOADOUT provides the correct frequency re-
quired, or drive LOADIN after delay through some external cir-
cuitry.
8-Bit Pseudo Color in 8:1 Multiplexing Mode
When 8:1 Multiplexing Mode is selected by setting Bit CR37 of
Command Register 3 to Logic “1” and bit CR36 of Command
Register 3 to Logic “0,” the ADV7160/ADV7162 goes into 8-
Bit Pseudo-Color Mode irrespective of the Color Mode selected
by Bits CR27 to CR24 in Command Register 2. Hence
LOADOUT operates at f
in parallel by the rising edge of LOADIN. These 8-bit pixels
are then selected, one at a time, to produce an 8-bit pixel stream
which passes through the Pixel Mask to address the LUT. The
order the eight 8-bit pixels are displayed is GA, RA, GB, RB,
GC, RC, GD, RD.
VRAM (BANK A)
VRAM (BANK B)
VRAM (BANK C)
VRAM (BANK D)
Figure 31. Direct Interfacing of Video Memory to
ADV7160/ADV7162
VIDEO MEMORY/
FRAME BUFFER
50MHz
50MHz
50MHz
50MHz
50MHz
50MHz
50MHz
50MHz
50MHz
50MHz
50MHz
50MHz
24
24
24
24
CLOCK
ADV7160/ADV7162
/8. Eight 8-bit pixels are latched
MULTIPLEXER
ADV7160/ADV7162
24
200MHz
(4
50MHz)