PCA9515D Philips Semiconductors, PCA9515D Datasheet - Page 2

• Manufacturer Part Number: PCA9515D
• Description: I2C-bus repeater
• Manufacturer: Philips Semiconductors

the PCA9515, PCA9516, or PCA9518 but can be used in series with
Philips Semiconductors
DESCRIPTION
The PCA9515 is a BiCMOS integrated circuit intended for
application in I
While retaining all the operating modes and features of the I
system it permits extension of the I
(SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF.
The I
devices and bus length. Using the PCA9515 enables the system
designer to isolate two halves of a bus, thus more devices or longer
length can be accommodated. It can also be used to run two buses,
one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus,
where the 100 kHz bus is isolated when 400 kHz operation of the
other is required.
Two or more PCA9515s cannot be put in series. The PCA9515
design does not allow this configuration. Since there is no direction
pin, slightly different “legal” low voltage levels are used to avoid
lock-up conditions between the input and the output. A “regular low”
applied at the input of a PCA9515 will be propagated as a “buffered
low” with a slightly higher value. When this “buffered low” is applied
to another PCA9515, PCA9516, or PCA9518 in series, the second
PCA9515, PCA9516, or PCA9518 will not recognize it as a “regular
low” and will not propagate it as a “buffered low” again. The
PCA9511/9513/9514 and PCA9512 cannot be used in series with
themselves since they use shifting instead of static offsets to avoid
lock-up conditions.
FEATURES
ORDERING INFORMATION
Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
1.
2004 Jun 24
2 channel, bi-directional buffer
I
Active-HIGH repeater enable input
Open-drain input/outputs
Lock-up free operation
Supports arbitration and clock stretching across the repeater
Accommodates standard mode and fast mode I
multiple masters
Powered-off high impedance I
Operating supply voltage range of 3.0 V to 3.6 V
5.5 V tolerant I
0 to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115, and 1000 V CDM per
JESD22-C101.
Latch-up testing is done to JEDEC Standard JESD78 which
exceeds 100 mA.
Package offerings: SO and TSSOP
8-pin plastic SO
8-pin plastic TSSOP
2
I
C-bus and SMBus compatible
2
2
The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater.
C-bus capacitance limit of 400 pF restricts the number of
C-bus repeater
PACKAGES
2
C and SMBus systems.
2
C and enable pins
TEMPERATURE RANGE
1
2
C pins
–40 C to +85 C
–40 C to +85 C
2
C-bus by buffering both the data
2
C devices and
2
C
ORDER CODE
PCA9515DP
PCA9515D
2
PIN CONFIGURATION
PIN DESCRIPTION
PIN
1
2
3
4
5
6
7
8
n.c.
SCL0
SDA0
GND
EN
SDA1
SCL1
V
CC
SYMBOL
TOPSIDE MARK
SDA0
SCL0
Figure 1. Pin configuration
GND
PCA9515
n.c.
9515
1
2
3
4
No connection
Serial clock bus 0
Serial data bus 0
Supply ground
Active high repeater enable input
Serial data bus 1
Serial clock bus 1
Supply power
SU01322
8
7
6
5
FUNCTION
DRAWING NUMBER
V
SCL1
SDA1
EN
CC
SOT505-1
Product data sheet
PCA9515
SOT96-1