LM1237AAF/NA National Semiconductor, LM1237AAF/NA Datasheet - Page 19
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LM1237AAF/NA
Manufacturer Part Number
LM1237AAF/NA
Description
150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD and 4 DACs
Manufacturer
National Semiconductor
Datasheet
1.LM1237AAFNA.pdf
(42 pages)
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OSD Generator Operation
Microcontroller Interface
The microcontroller interfaces to the LM1237 preamp via the
I
with a Start Pulse followed by a byte comprised of a seven
bit Slave Device Address and a Read/Write bit. Since the
first byte is composed of both the address and the read/write
bit, the address of the LM1237 for writing is 0xBA
(10111010b) and the address for reading is 0xBB
(10111011b). The development software provided by Na-
tional Semiconductor will automatically take care of the dif-
ference between the read and write addresses if the target
address under the communications tab is set to 0xBA. Fig-
ure 19 and Figure 20 show a write and read sequence on the
I
2
2
C compatible interface. The protocol of the interface begins
C compatible interface.
(Continued)
FIGURE 17. Shadowing
FIGURE 18. Bordering
19
WRITE SEQUENCE
The write sequence begins with a start condition which
consists of the master pulling SDA low while SCL is held
high. The slave device address is next sent. The address
byte is made up of an address of seven bits (7-1) and the
read/write bit (0). Bit 0 is low to indicate a write operation.
Each byte that is sent is followed by an acknowledge. When
SCL is high the master will release the SDA line. The slave
must pull SDA low to acknowledge. The register to be written
to is next sent in two bytes, the least significant byte being
sent first. The master can then send the data, which consists
of one or more bytes. Each data byte is followed by an
acknowledge bit. If more than one data byte is sent the data
will increment to the next address location. See Figure 19.
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