MAX1192 Maxim, MAX1192 Datasheet
MAX1192
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MAX1192 Summary of contents
Page 1
... The digital output format is offset binary. A separate digital power input accepts a voltage from 1.8V to 3.6V for flexible interfacing to dif- ferent logic levels. The MAX1192 is available in a 5mm × 5mm, 28-pin thin QFN package, and is specified for the extended industrial (-40°C to +85°C) temperature range ...
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... Thin QFN (derated 20.8mW/°C above +70°C) ..1667mW Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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... REFN Output Voltage COM Output Voltage V Differential Reference Output V Differential Reference Output V REFTC Temperature Coefficient Maximum REFP/REFN/COM I SOURCE Source Current Maximum REFP/REFN/COM Sink I Current BUFFERED EXTERNAL REFERENCE (V REFIN Input Voltage V COM Output Voltage V Differential Reference Output Maximum REFP/REFN/COM I SOURCE Source Current _______________________________________________________________________________________ ≈ ...
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... DD DD REFIN DD 0.33µ -40°C to +85°C, unless otherwise noted. Typical values are PARAMETER SYMBOL Maximum REFP/REFN/COM Sink I SINK Current REFIN Input Resistance REFIN Input Current UNBUFFERED EXTERNAL REFERENCE (REFIN = GND, V REFP Input Voltage REFN Input Voltage COM Input Voltage ...
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Ultra-Low-Power, 22Msps, Dual 8-Bit ADC ELECTRICAL CHARACTERISTICS (continued 3.0V 1.8V REFIN DD 0.33µ -40°C to +85°C, unless otherwise noted. Typical values are PARAMETER SYMBOL POWER REQUIREMENTS ...
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Ultra-Low-Power, 22Msps, Dual 8-Bit ADC ELECTRICAL CHARACTERISTICS (continued 3.0V 1.8V REFIN DD 0.33µ -40°C to +85°C, unless otherwise noted. Typical values are PARAMETER SYMBOL TIMING CHARACTERISTICS ...
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Ultra-Low-Power, 22Msps, Dual 8-Bit ADC (V = 3.0V 1.8V REFIN 22.005678MHz at 50% duty cycle +25°C, unless otherwise noted.) A FFT PLOT CHANNEL A (DIFFERENTIAL INPUTS, 8192-POINT DATA RECORD ...
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Ultra-Low-Power, 22Msps, Dual 8-Bit ADC (V = 3.0V 1.8V REFIN DD 22.005678MHz at 50% duty cycle +25°C, unless otherwise noted.) A FFT PLOT CHANNEL A (SINGLE-ENDED INPUTS, 8192-POINT DATA RECORD) 0 ...
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Ultra-Low-Power, 22Msps, Dual 8-Bit ADC (V = 3.0V 1.8V REFIN 22.005678MHz at 50% duty cycle +25°C, unless otherwise noted.) A SIGNAL-TO-NOISE RATIO vs. ANALOG INPUT FREQUENCY 50.0 49.5 49.0 48.5 48.0 ...
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Ultra-Low-Power, 22Msps, Dual 8-Bit ADC (V = 3.0V 1.8V REFIN DD 22.005678MHz at 50% duty cycle +25°C, unless otherwise noted.) A SIGNAL-TO-NOISE RATIO vs. ANALOG INPUT POWER 5.512345MHz ...
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Ultra-Low-Power, 22Msps, Dual 8-Bit ADC (V = 3.0V 1.8V REFIN 22.005678MHz at 50% duty cycle +25°C, unless otherwise noted.) A SIGNAL-TO-NOISE RATIO vs. SAMPLING RATE 5.512345MHz IN 49 ...
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Ultra-Low-Power, 22Msps, Dual 8-Bit ADC (V = 3.0V 1.8V REFIN DD 22.005678MHz at 50% duty cycle +25°C, unless otherwise noted.) A SIGNAL-TO-NOISE RATIO vs. CLOCK DUTY CYCLE 5.512345MHz ...
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Ultra-Low-Power, 22Msps, Dual 8-Bit ADC (V = 3.0V 1.8V REFIN 22.005678MHz at 50% duty cycle +25°C, unless otherwise noted.) A INTEGRAL NONLINEARITY 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 ...
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... Ultra-Low-Power, 22Msps, Dual 8-Bit ADC (V = 3.0V 1.8V REFIN DD 22.005678MHz at 50% duty cycle +25°C, unless otherwise noted.) A SUPPLY CURRENT vs. INPUT FREQUENCY MAX1192 toc33 3.0 2.5 DIGITAL SUPPLY CURRENT 2.0 1.5 1.0 ANALOG SUPPLY CURRENT 0 (MHz) IN PIN NAME 1 INA- Channel A Negative Analog Input. For single-ended operation, connect INA- to COM. ...
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... D0–D7 until the signal has been processed by all stages. Digital error correction compensates for ADC comparator off- sets in each pipeline stage and ensures no missing codes. Figure 2 shows the MAX1192 functional diagram. PIPELINE / DEC ADC ...
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... C1a and C1b to the output of the amplifier and switch S4c is closed. The resulting differential volt- ages are held on capacitors C2a and C2b. The ampli- fiers charge capacitors C1a and C1b to the same CLK HOLD INTERNAL TRACK NONOVERLAPPING CLOCK SIGNALS MAX1192 ...
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... C2a and C2b. These values are then presented to the first stage quantizers and iso- late the pipelines from the fast-changing inputs. The wide input bandwidth T/H amplifiers allow the MAX1192 to track and sample/hold analog inputs of high frequen- cies (>Nyquist). Both ADC inputs (INA+, INB+, INA-, and INB-) can be driven either differentially or single ended ...
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... Figure 6). The capacitive load on the digital outputs D0–D7 should be kept as low as possible (<15pF) to avoid large digital currents feeding back into the analog por- tion of the MAX1192 and degrading its dynamic perfor- mance. Buffers on the digital outputs isolate them from CHB CHA ...
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... Normal Operating heavy capacitive loads. To improve the dynamic perfor- mance of the MAX1192, add 100Ω resistors in series with the digital outputs close to the MAX1192. Refer to the MAX1193 Evaluation Kit schematic for an example of the digital outputs driving a digital buffer through 100Ω series resistors. ...
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... When the outputs transition from tri- state to on, the last converted word is placed on the digital outputs. In the normal operating mode, all sections of the MAX1192 are powered. 20 ______________________________________________________________________________________ R4 R5 600Ω ...
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... Buffered External Reference Drives The buffered external reference mode allows for more control over the MAX1192 reference voltage and allows multiple converters to use a common reference. To drive one MAX1192 in buffered external reference mode, the external circuit must sink 0.7µA, allowing one reference circuit to easily drive the REFIN of multiple converters to 1.024V ± ...
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... The 1.248V output of the MAX6061 is divided down to 1.023V as it passes through a one-pole, 10Hz, lowpass filter to the MAX4250. The MAX4250 buffers the 1.023V reference before its output is applied to the MAX1192. The MAX4250 provides a low offset voltage (for high gain accuracy) and a low noise level. 22 ______________________________________________________________________________________ 0.33µ ...
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... ADCs at ±0.5V. The common power supply for all active components removes any concern regarding power-supply sequencing when powering up or down. With the outputs of the MAX4252 matching better than 0.1%, the buffers and subsequent lowpass filters sup- port as many as 160 MAX1192s REFP 0.33µF ...
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... At the receiver, the QAM signal is demodulated into analog I and Q components. Figure 12 displays the demodulation process performed in the analog domain using the MAX1192 dual-matched, 3V, 8-bit ADC and the MAX2451 quadrature demodulator to recover and digitize the I and Q baseband signals. Before being dig- ...
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... LSB above midscale. The offset error is the amount of deviation between the measured transition point and the ideal transition point. Ideally, the full-scale MAX1192 transition occurs at 1.5 LSB below full-scale. The gain error is the amount of deviation between the measured transition point and the ideal transition point with the offset error removed. ...
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... HD3 is defined as the ratio of the RMS value of the third harmonic component to the fundamental input signal. Spurious-Free Dynamic Range (SFDR) SFDR is the ratio expressed in decibels of the RMS amplitude of the fundamental (maximum signal compo- nent) to the RMS value of the next largest spurious component, excluding DC offset. Intermodulation Distortion (IMD) ...
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... Ultra-Low-Power, 22Msps, Dual 8-Bit ADC (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) D D/2 PIN # 1 I.D. C ______________________________________________________________________________________ 0. 0. E/2 (NE- DETAIL Package Information 0. ...
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... DRAWING CONFORMS TO JEDEC MO220. 10. WARPAGE SHALL NOT EXCEED 0.10 mm. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. ...