DS2432X Dallas Semiconducotr, DS2432X Datasheet - Page 16

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DS2432X

Manufacturer Part Number
DS2432X
Description
1k-Bit Protected 1-Wire EEPROM with SHA-1 Engine
Manufacturer
Dallas Semiconducotr
Datasheet
PRELIMINARY
not write-protected the SHA engine will start and within 2.0 ms compute a new secret that is then
automatically copied to the secrets register. Replacing the secret takes maximum 10 ms. During this time
and the computation of the secret the voltage on the 1-Wire bus must not fall below 2.8V. After copying
is finished the DS2432 fills the scratchpad with AAh bytes. Now a pattern of alternating 1’s and 0’s will
be transmitted until the master issues a reset pulse.
Since the content of the scratchpad is used as a partial secret, the master must fill the scratchpad with a
known 8-byte data pattern using the Write Scratchpad command before it issues the Compute Next
Secret command. Otherwise the new secret will depend on data that was unintentionally left in the
scratchpad from previous commands.
Copy Scratchpad [55h]
The data memory of the DS2432 can be read without any restrictions. Executing the Copy Scratchpad
command to write new data to the memory or register page, however, requires the knowledge of the
device’s secret and the ability to perform a SHA-1 computation to generate the 160-bit Message
Authentication Code (MAC) to start the data transfer from the scratchpad to the memory. The master may
perform the MAC computation in software or use a DS1963S as a coprocessor. The coprocessor approach
has the benefit that the secret remains hidden in the coprocessor iButton. The sequence in which the
resulting MAC needs to be sent to the DS2432 is shown in Table 2. Table 3 shows how the various data
components are entered into the SHA engine. The SHA computation algorithm is explained later in this
document.
Message Authentication Code Transmission Sequence Table 2
After issuing the Copy Scratchpad command, the master must provide a 3-byte authorization pattern,
which should have been obtained by an immediately preceding Read Scratchpad command. This 3-byte
pattern must exactly match the data contained in the three address registers (TA1, TA2, E/S, in that
order). If the authorization code matches and the target memory is not write-protected, the DS2432 will
start its SHA engine to compute a 160-bit MAC that is based on the current secret, all of the scratchpad
data, the first 28 bytes of the addressed memory page, and the DS2432's registration number (without the
CRC). Simultaneously the master computes a MAC from the same data and sends it to the DS2432 as
evidence that it is authorized to write to the EEPROM. Now the master waits for 10 ms during which the
voltage on the 1-Wire bus must not fall below 2.8V. If the MAC generated by the DS2432 matches the
MAC that the master computed, the DS2432 will set its AA (Authorization Accepted) flag, and copy the
entire scratchpad contents to the data EEPROM. As indication for a successful copy the master will be
able to read a pattern of alternating 1’s and 0’s until it issues a Reset Pulse. A pattern of all zeros tells the
master that the copy did not take place.
E[31:24]
D[31:24]
C[31:24]
B[31:24]
A[31:24]
The transmission is least significant bit first starting with Register E.
E[23:16]
D[23:16]
C[23:16]
B[23:16]
A[23:16]
E[15:8]
D[15:8]
C[15:8]
B[15:8]
A[15:8]
16 of 30
E[7:0]
D[7:0]
C[7:0]
B[7:0]
A[7:0]
Shift
Direction
DS2432

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