DS1238 Dallas, DS1238 Datasheet - Page 2

• Manufacturer Part Number: DS1238
• Description: MicroManager
• Manufacturer: Dallas

debounce circuit connected to the
the active state if the strobe input is not driven low prior to watchdog timeout. Oscillator control pins
OSCSEL and OSCIN provide either external or internal clock timing for both the reset pulse width and
the watchdog timeout period. The Watchdog Status and Reset Voltage Threshold are provided via
and
PIN DESCRIPTION
POWER MONITOR
The DS1238 employs a band gap voltage reference and a precision comparator to monitor the 5-volt
supply (V
RST, and
so that the
The V
signals are excellent for microprocessor reset control, as processing is stopped at the last possible moment
of in-tolerance V
the RST and
to allow the power supply and microprocessor to stabilize.
PIN NAME
V
V
V
GND
PF
OSCIN
OSCSEL
IN
RST
ST
RVT
NMI
CEO
CEI
WDS
RST
BAT
CCO
CC
RVT
CCTP
, respectively. A block diagram of the DS1238 is shown in Figure 1.
CC
RST
for the 5% operation option (DS1238-5) is set for 4.75 volts (4.62 typical). The RST and
RVT
) in microprocessor-based systems. When an out-of-tolerance condition occurs, the
RST
outputs are driven to the active state. The V
, RST and
CC
Active high reset output.
DESCRIPTION
+3V battery input provides nonvolatile operation of control functions.
V
+5V primary power input.
System ground.
Power-fail indicator, active high, used for external power switching as shown in
Figure 9.
Reset Voltage Threshold. Indicates that V
Oscillator input or timing capacitor. See Table 1.
Oscillator Select. Selects internal or external clock functions. See Table 1.
Early warning power-fail input. This voltage sense point can be tied (via resistor
divider) to a user-selected voltage.
Non-maskable interrupt. Used in conjunction with the IN pin to indicate an impending
power failure.
Strobe input. A high-to-low transition will reset the watchdog timer, indicating that
software is still in control.
Chip enable output. Write protected. Used with nonvolatile SRAM applications.
Chip enable input.
Watchdog Status. Indicates that a watchdog timeout has occurred.
Active low reset output.
signals remain active for a minimum of 50 ms (100 ms typical) after V
. On power up,
CC
output for nonvolatile SRAM applications.
RST
outputs will become active as V
RST
RVT
pin. An internal watchdog timer can also force the reset outputs to
will become inactive as soon as V
2 of 14
CC
CC
is below the reset voltage threshold.
trip point (V
CC
falls below 4.5 volts (4.37 typical).
CC
CCTP
rises above V
) is set for 10% operation
CCTP
CCTP
. However,
is reached
DS1238
RVT
WDS
RST
,