74LVC1G00 Philips, 74LVC1G00 Datasheet - Page 2

• Manufacturer Part Number: 74LVC1G00
• Description: Single 2-input NAND gate
• Manufacturer: Philips

Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. The condition is V
2001 Apr 05
t
C
C
SYMBOL
PHL
Wide supply voltage range from 1.65 to 5.5 V
High noise immunity
Complies with JEDEC standard:
– JESD8-7 (1.65 to 1.95 V)
– JESD8-5 (2.3 to 2.7 V)
– JESD8B/JESD36 (2.7 to 3.6 V).
CMOS low power consumption
Latch-up performance 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
SOT353 package.
I
PD
Single 2-input NAND gate
24 mA output drive (V
P
f
f
C
V
i
o
/t
D
CC
PD
= input frequency in MHz;
L
PLH
= output frequency in MHz;
= output load capacitance in pF;
= C
is used to determine the dynamic power dissipation (P
= supply voltage in Volts.
PD
propagation delay inputs A and B to
output Y
input capacitance
power dissipation capacitance per buffer
amb
V
CC
= 25 C; t
2
I
f
= GND to V
i
+ (C
CC
PARAMETER
r
= t
= 3.0 V)
L
f
V
2.5 ns.
CC
CC
2
.
f
o
) where:
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
2
DESCRIPTION
The 74LVC1G00 is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. This
feature allow the use of these devices in a mixed
3.3 and 5 V environment.
Schmitt-trigger action at all inputs makes the circuit
tolerant for slower input rise and fall time.
This device is fully specified for partial power-down
applications using I
preventing the damaging current backflow through the
device when it is powered down.
The 74LVC1G00 provides the single 2-input NAND
function.
= 1.8 V; C
= 2.5 V; C
= 2.7 V; C
= 3.3 V; C
= 5.0 V; C
= 3.3 V; notes 1 and 2
D
in W).
CONDITIONS
L
L
L
L
L
= 30 pF; R
= 30 pF; R
= 30 pF; R
= 50 pF; R
= 50 pF; R
off
. The I
L
L
L
L
L
= 1 k
= 500
= 500
= 500
= 500
off
circuitry disables the output,
Product specification
3.3
2.2
2.6
2.2
1.8
5
14
TYPICAL
74LVC1G00
ns
ns
ns
ns
ns
pF
pF
UNIT