CLC018 National Semiconductor, CLC018 Datasheet

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CLC018

Manufacturer Part Number
CLC018
Description
8 x 8 Digital Crosspoint Switch/ 1.4 Gbps
Manufacturer
National Semiconductor
Datasheet

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© 1998 National Semiconductor Corporation
CLC018
8 x 8 Digital Crosspoint Switch, 1.4 Gbps
General Description
National’s Comlinear CLC018 is a fully differential 8x8 digital
crosspoint switch capable of operating at data rates exceed-
ing 1.4 Gbps per channel. Its non-blocking architecture uti-
lizes eight independent 8:1 multiplexers to allow each output
to be independently connected to any input and any input to
be connected to any or all outputs. Additionally, each output
can be individually disabled and set to a high-impedance
state. This TRI-STATE
larger switch array sizes.
Low channel-to-channel crosstalk allows the CLC018 to pro-
vide superior all-hostile jitter of 50 ps
fidelity along with low power consumption of 850 mW make
the CLC018 ideal for digital video switching plus a variety of
data communication and telecommunication applications.
The fully differential signal path provides excellent noise im-
munity, and the I/Os support ECL and PECL logic levels. In
addition, the inputs may be driven single-ended or differen-
tially and accept a wide range of common mode levels in-
cluding the positive supply. Single +5V or −5V supplies or
dual +5V supplies are supported. Dual supply mode allows
the control signals to be referenced to the positive supply
(+5V) while the high-speed I/O remains ECL compatible.
The double row latch architecture utilized in the CLC018 al-
lows switch reprogramming to occur in the background dur-
ing operation. Activation of the new configuration occurs with
a single “configure” pulse. Data integrity and jitter perfor-
mance on unchanged outputs are maintained during recon-
figuration. Two reset modes are provided. Broadcast reset
results in all outputs being connected to input port DI0.
TRI-STATE Reset results in all outputs being disabled.
CLC018 Block Diagram
®
feature allows flexible expansion to
PP
. This excellent signal
DS100088
The CLC018 is fabricated on a high-performance BiCMOS
process and is available in a 64-lead plastic quad flat pack
(PQFP).
Features
n Fully differential signal path
n Non-Blocking
n Flexible expansion to larger array sizes with very low
n Single +5/−5V or dual
n TRI-STATE outputs
n Double row latch architecture
n 64-lead PQFP package
Applications
n Serial digital video routing (SMPTE 259M)
n Telecom/datacom switching
n ATM SONET
Key Specifications
n High speed:
n Low jitter:
n Low power; 850 mW with all outputs active
n Fast output edge speeds: 250 ps
power
<
<
50 ps
100 ps
DS100088-2
PP
PP
for rates
>
for rates
1.4 Gbps
<
±
<
500 Mbps
5V operation
1.4 Gbps
October 1998
www.national.com
DS100088-1

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CLC018 Summary of contents

Page 1

... This excellent signal PP fidelity along with low power consumption of 850 mW make the CLC018 ideal for digital video switching plus a variety of data communication and telecommunication applications. The fully differential signal path provides excellent noise im- munity, and the I/Os support ECL and PECL logic levels. In ...

Page 2

... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V –V CC EE) V Maximum LL V Minimum LL Storage Temperature Range Lead Temp. (Soldering 4 sec.) ESD Rating Package Thermal Resistance 64-Pin PQFP ...

Page 3

Electrical Characteristics ( −5V 0V; unless otherwise specified) (Note 4 Parameter Signal I/O: Output Voltage Swing Output Voltage Range Lower Limit Output Voltage Range Upper Limit Control Inputs: Input Voltage - ...

Page 4

Typical Performance Characteristics www.national.com DS100088-3 DS100088-5 DS100088-7 4 DS100088-4 DS100088-6 DS100088-8 ...

Page 5

... DATA INPUT PINS DI0 and DI0 through DI7 and D17 are the data input pins to the CLC018. Depending upon how the Power pins are con- nected (please refer to the Power Pin section above) the data may be either differential ECL, or differential PECL. To drive the CLC018 inputs with a single-ended signal, please refer to the section “ ...

Page 6

Timing Diagrams FIGURE 1. Timing Diagram — TRI-STATE Reset FIGURE 2. Timing Diagram — “Broadcast Reset” www.national.com 6 DS100088-10 DS100088-11 ...

Page 7

... Differential inputs are the preferred method of providing data to the CLC018, however, there are times when the only sig- nal available is single ended. To use the CLC018 with a single ended input, the unused input pin needs to be biased at a point higher than the low logic level, and lower than the high logic level ...

Page 8

... The most robust solution for single ended inputs is to place a comparator with hysteresis in front of the CLC018. Such a part is the MC10E1652. See Figure 6 for an example of how to hook this up. FIGURE 5. Single Ended Input to CLC018 FIGURE 6 ...

Page 9

... As an example, a single CLC018 can be used for an 8x8 array, and it will dissipate about 0.85W array will require 16 CLC018s and will consume only about 4W ...

Page 10

... CC impedance transmission line as shown in Figure con- trol the switch array, the IA, OA and TRI busses are all con- nected in parallel and a decoder is used to assert high the CS of the CLC018 that addressed. This is also shown in Figure ± Dual ...

Page 11

... EXPANDING THE NUMBER OF INPUT PORTS Expanding the number of inputs in a switch array is accom- plished by wire-ORing the outputs together, and TRI- STATEing the outputs of the CLC018s that do not have their inputs selected. The output bus should be a controlled im- pedance transmission line with proper termination. This is shown in Figure 11 ...

Page 12

Operation (Continued) www.national.com FIGURE 11. Expanded Input Ports 12 DS100088-21 ...

Page 13

Operation (Continued) FIGURE 12 Output Switch Array 13 DS100088-22 www.national.com ...

Page 14

... With its 250 ps output transitions, which im- ply a bandwidth of 4 GHz or more, transmission lines driven by the CLC018 must be carefully designed and correctly ter- minated. Either microstrip line, which resides on the outer surfaces of a printed circuit board and paired with an image ...

Page 15

Operation (Continued) FIGURE 13. Input/Output Bussing 15 DS100088-23 www.national.com ...

Page 16

Operation (Continued) Configuration Truth Table IA2 IA1 IA0 OA2 OA1 ...

Page 17

17 ...

Page 18

... National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. 64-Lead PQFP Order Number CLC018AJVJQ NS Package Number VJE64A 2. A critical component in any component of a life support ...

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