W83194R-58A Winbond, W83194R-58A Datasheet - Page 9

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W83194R-58A

Manufacturer Part Number
W83194R-58A
Description
100MHZ AGP CLOCK FOR VIA CHIPSET
Manufacturer
Winbond
Datasheet
8.3.2 Register 1 : CPU , 48/24 MHz Clock Register (1 = Active, 0 = Inactive)
8.3.3 Register 2: PCI Clock Register (1 = Active, 0 = Inactive)
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
@PowerUp
@PowerUp
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
x
Pin
Pin
40
41
43
44
15
14
12
11
10
7
8
-
-
-
-
-
0 = 0.5% down type spread, overrides Byte0-bit7.
1= Center type spread.
Reserved
Reserved
Reserved
CPUCLK3 (Active / Inactive)
CPUCLK2 (Active / Inactive)
CPUCLK1 (Active / Inactive)
CPUCLK0 (Active / Inactive)
Reserved
PCICLK_F (Active / Inactive)
AGP0 (Active / Inactive)
PCICLK4 (Active / Inactive)
PCICLK3 (Active / Inactive)
PCICLK2 (Active / Inactive)
PCICLk1 (Active / Inactive)
PCICLK0 (Active / Inactive)
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Description
Description
Publication Release Date: Nov. 1999
W83194R-58A
PRELIMINARY
Revision 0.30

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