CAT1163 Catalyst Semiconductor, CAT1163 Datasheet - Page 5

• Manufacturer Part Number: CAT1163
• Description: Supervisory Circuit with I2C Serial CMOS EEPROM/ Precision Reset Controller and Watchdog Timer
• Manufacturer: Catalyst Semiconductor

PIN DESCRIPTIONS
WDI:
If there is no transition on the WDI for more than 1.6
seconds, the watchdog timer times out.
WP:
If the pin is tied to V
becomes Write Protected (READ only). When the pin
is tied to GND or left floating normal read/write
operations are allowed to the device.
RESET/RESET
These are open drain pins and can be used as reset
trigger inputs. By forcing a reset condition on the pins
the device will initiate and maintain a reset condition.
The RESET pin must be connected through a pull-
down resistor and the RESET pin must be connected
through a pull-up resistor.
SDA:
The bidirectional serial data/address pin is used to
transfer all data into and out of the device. The SDA
pin is an open drain output and can be wire-ORed
with other open drain or open collector outputs.
SCL:
Serial clock input.
DEVICE OPERATION
Reset Controller Description
The CAT1163 precision RESET controller ensures
correct system operation during brownout and power
up/down conditions. It is configured with open drain
Figure 1. RESET Output Timing
RESET
RESET
V
WATCHDOG INPUT
WRITE PROTECT
RESET
RESET
SERIAL DATA ADDRESS
SERIAL CLOCK
RESET
RESET: RESET I/O
CC
V
RVALID
V
TH
CC
the entire memory array
t
PURST
t
GLITCH
5
t
RPD
RESET outputs. During power-up, the RESET outputs remain
active until V
driving the outputs for approximately 200ms (t
reaching V
cease to drive the reset outputs. At this point the reset
outputs will be pulled up or down by their respective pull up/
down resistors. During power-down, the RESET outputs will
be active when V
be valid so long as V
The RESET pins are I/Os; therefore, the CAT1163 can act as
a signal conditioning circuit for an externally applied reset.
The inputs are edge triggered; that is, the RESET input in the
CAT1163 will initiate a reset timeout after detecting a low to
high transition and the RESET input in the CAT1163 will
initiate a reset timeout after detecting a high to low transition.
Watchdog Timer
The Watchdog Timer provides an independent protection for
microcontrollers. During a system failure, the CAT1163 will
respond with a reset signal after a time-out interval of 1.6
seconds for a lack of activity. The CAT1163 is designed with
a WDI input pin for the Watchdog Timer function. If the
microcontroller does not toggle the WDI input pin within 1.6
seconds, the Watchdog Timer times out. This will generate
a reset condition on reset outputs. The Watchdog Timer is
cleared by any transition on WDI.
As long as the reset signal is asserted, the Watchdog Timer
will not count and will stay cleared.
TH
CC
. After the t
reaches the V
CC
t
PURST
falls below V
CC
PURST
is >1.0V (V
timeout interval, the device will
TH
TH
threshold and will continue
. The RESET outputs will
RVALID
t
RPD
Doc No. 3003, Rev. C
CAT1163
).
PURST
) after