AD744 Analog Devices, AD744 Datasheet - Page 9

• Manufacturer Part Number: AD744
• Description: Precision/ 500 ns Settling BiFET Op Amp
• Manufacturer: Analog Devices

Using Decompensation to Extend the Gain Bandwidth
Product
When the AD744 is used in applications where the closed-loop
gain is greater than 10, gain bandwidth product may be enhanced
by connecting a small capacitor between Pins 1 and 5 (Figure
33). At low frequencies, this capacitor cancels the effects of the
chip’s internal compensation capacitor, C
ompensating the amplifier.
V
IN
SEE TABLE II
R1
R1
( )
4.99 k
4.99 k
4.99 k
4.99 k
499 Ω
499 Ω
499 Ω
NOTES
1
2
Bandwidth with C
Into large capacitive loads the AD744’s 25 mA output current limit sets the slew rate of the amplifier, in V/ µs, equal to 0.025
amps divided by the value of C
specified with a 50 pF. load.
Table II. Recommended Values of C
Figures 31 and 32.
AD744
–V
C
S
4.99 k
4.99 k
4.99 k
4.99 k
4.99 k
4.99 k
4.99 k
LEAD
( )
+V
R2
S
1 F
LEAD
C
COMP
R2
1 F
adjusted for minimum settling time.
OPTIONAL
Follower
0.1 F
Gain
2
2
2
2
11
11
11
LOAD
COMP
0.1 F
in µF. Slew rate is specified into rated max C
, effectively dec-
Inverter
Gain
V
OUT
1
1
1
1
10
10
10
COMP
vs. Various Load Conditions for the Circuits of
C
50
150
1000
270
390
1000
>2000
Max
(pF)
LOAD
Due to manufacturing variations in the value of the internal
C
optimized for the desired gain by using a 2 to 10 pF trimmer
capacitor rather than using a fixed value.
R1
( )
1 k
100
100
Table III. Performance Summary for the Circuit of Figure 33
COMP
C
(pF)
, it is recommended that the amplifier’s response be
R2
( )
10 k
10 k
100 k 1001
0
5
20
25
0
2
5
COMP
V
IN
LOAD
R1
Gain
Follower
11
101
C
except for cases marked
(pF)
7
7
–
–
–
–
–
LEAD
–V
AD744
S
+V
(V/ s)
Slew
Rate
75
37
14
12.5
75
50
37
1 F
S
Gain
Inverter
10
100
1000
2
2 – 10pF
2
R2
1 F
NOT CONNECTED
0.1 F
2
Bandwidth
, which are
(MHz)
–3 dB
2.5
2.3
1.2
1.0
1.2
0.85
0.60
–3 dB
Bandwidth
2.5 MHz
760 kHz
225 kHz
0.1 F
SEE TABLE III
1
1
AD744
V
OUT
Gain/BW
Product
25 MHz
76 MHz
225 MHz