AD7393AN Analog Devices, AD7393AN Datasheet
AD7393AN
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AD7393AN Summary of contents
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... CODE – Decimal Figure 1. AD7392 Differential Nonlinearity Error vs. Code REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices ...
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AD7392/AD7393–SPECIFICATIONS AD7392 ELECTRICAL CHARACTERISTICS Parameter STATIC PERFORMANCE 1 Resolution 2 Relative Accuracy 2 Differential Nonlinearity Zero-Scale Error Full-Scale Voltage Error 3 Full-Scale Tempco REFERENCE INPUT V Range REF IN Input Resistance 3 Input Capacitance ANALOG OUTPUT Current (Source) Output Current ...
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AD7393 ELECTRICAL CHARACTERISTICS Parameter STATIC PERFORMANCE 1 Resolution 2 Relative Accuracy 2 Differential Nonlinearity Zero-Scale Error Full-Scale Voltage Error 3 Full-Scale Tempco REFERENCE INPUT V Range REF IN Input Resistance 3 Input Capacitance ANALOG OUTPUT Output Current (Source) Output Current ...
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... FS D0– THE Model DAC REGISTER AD7392AN TO AD7392AR INTERNAL DAC AD7393AN SWITCHES AD7393AR AD7393ARU 10 NOTES XIND = – +85 C; AUTO = – +125 C. The AD7392 contains 709 transistors. The die size measures 78 mil 6630 sq. mil. –4– PIN CONFIGURATIONS 1 20 ...
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AD7392 V = 2. 2.5V REF 0 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1 0 512 1024 1536 2048 2560 3072 3584 4096 CODE – Decimal Figure 5. AD7392 ...
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AD7392/AD7393 1000 AD7393 LOGIC 2.5V REF 800 600 5.5V, CODE = 155 5.5V, CODE = ...
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IDD ( (V) OUT SHDN 0% 0 TIME – 100 s/DIV Figure 23. Shutdown Recovery Time NOTE Positive logic transition; X Don’t Care. OPERATION ...
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AD7392/AD7393 AMPLIFIER SECTION The internal DAC’s output is buffered by a low power con- sumption precision amplifier. The op amp has typical settling time to 0.1% of full scale. There are slight differences in settling time for ...
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INPUT LOGIC LEVELS All digital inputs are protected with a Zener-type ESD protec- tion structure (Figure 28) that allows logic input voltages to exceed the V supply voltage. This feature can be useful if the DD user is driving one ...
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AD7392/AD7393 UNIPOLAR OUTPUT OPERATION This is the basic mode of operation for the AD7392. As shown in Figure 29, the AD7392 has been designed to drive loads as low parallel with 100 pF. The code table ...
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SEATING PLANE REV. A OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Lead Plastic DIP Package (N-20) 1.060 (26.90) 0.925 (23.50 0.280 (7.11) 0.240 ...