AD7233 Analog Devices, AD7233 Datasheet - Page 5

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AD7233

Manufacturer Part Number
AD7233
Description
LC2MOS 12-Bit Serial Mini-DIP DACPORT
Manufacturer
Analog Devices
Datasheet

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There are two ways in which the DAC latch and hence the ana-
log output may be updated. The status of the LDAC input is
examined after SYNC is taken low. Depending on its status, one
of two update modes is selected.
If LDAC = 0 then the automatic update mode is selected. In
this mode the DAC latch and analog output are updated auto-
matically when the last bit in the serial data stream is clocked in.
The update thus takes place on the sixteenth falling SCLK edge.
SYNC
SCLK
LDAC
SDIN
LDAC
SYNC
SCLK
SDIN
DON'T CARE
t
2
DB15
DON'T CARE
RESET
DB14
t
COUNTER/
1
DECODER
AUTO-UPDATE
–16
CIRCUITRY
DON'T CARE
DB13
DON'T CARE
GATING
SIGNAL
DB12
If LDAC = 1 then the automatic update is disabled and the
DAC latch is updated by taking LDAC low any time after the
16-bit data transfer is complete. The update now occurs on the
falling edge of LDAC. This facility is useful for simultaneous
update in multi-DAC systems. Note that the LDAC input must
be taken back high again before the next data transfer is initiated.
t
4
GATED
DB11
SCLK
MSB
t
5
INPUT SHIFT REGISTER (16 BITS)
DAC LATCH (12 BITS)
DB1
DB0
LSB
t
3
t
6
t
7
AD7233
t
8

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