LTC3836 LINER [Linear Technology], LTC3836 Datasheet - Page 20

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LTC3836

Manufacturer Part Number
LTC3836
Description
Dual 2-Phase, No RSENSETM Low VIN Synchronous Controller
Manufacturer
LINER [Linear Technology]
Datasheet

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LTC3836
APPLICATIONS INFORMATION
are the same but exhibit a phase difference, the current
sources turn on for an amount of time corresponding to
the phase difference. The voltage on the PLLLPF pin is
adjusted until the phase and frequency of the internal and
external oscillators are identical. At the stable operating
point, the phase detector output is high impedance and
the fi lter capacitor C
The loop fi lter components, C
current pulses from the phase detector and provide a
stable input to the voltage-controlled oscillator. The fi lter
components C
acquires lock. Typically R
0.01μF .
Typically, the external clock (on SYNC/FCB pin) input high
level is 1.6V, while the input low level is 1.2V.
Table 1 summarizes the different states in which the
PLLLPF pin can be used.
Table 1.
PLLLPF PIN
0V
Floating
V
RC Loop Filter
Topside MOSFET Drive Supply (C
In the Functional Diagram, external bootstrap capaci-
tor C
V
a MOSFET is to be turned on, the C
across the gate-source of the desired device. When the
topside MOSFET is on, the BOOST pin voltage is above
the input supply. V
total input capacitance of the topside MOSFET. The reverse
breakdown of D
shows how a 5V gate drive can be achieved if a secondary
20
IN
IN
) through diode D
B
is charged from a boost power source (usually
LP
SYNC/FCB PIN
B
Clock Signal
DC Voltage
DC Voltage
DC Voltage
must be greater than V
and R
BOOST
LP
B
holds the voltage.
when the SW node is low. When
LP
= 2V
LP
determine how fast the loop
= 10k and C
IN
LP
Phase-Locked to External Clock
. C
and R
B
B
must be 100 times the
, D
B
FREQUENCY
LP
B
voltage is applied
300kHz
550kHz
750kHz
)
, smooth out the
IN(MAX)
LP
is 2200pF to
. Figure 6
5V supply is available. Note that in applications where the
supply voltage to C
approximately 500μA in shutdown mode.
Table 2 summarizes the different states in which the
SYNC/FCB pin can be used
Table 2.
SYNC/FCB PIN
0V to 0.5V
0.7V to V
External Clock Signal
Fault Condition: Short-Circuit and Current Limit
To prevent excessive heating of the bottom MOSFET,
foldback current limiting can be added to reduce the cur-
rent in proportion to the severity of the fault.
Foldback current limiting is implemented by adding
diodes D
pin as shown in Figure 11. In a hard short (V
the current will be reduced to approximately 50% of the
maximum output current.
IN
FB1
Figure 11. Foldback Current Limiting
and D
I
TH
1/2 LTC3836
B
FB2
exceeds V
V
CONDITION
Forced Continuous Mode
Current Reversal Allowed
Pulse-Skipping Operation Enabled
No Current Reversal Allowed
Enable Phase-Locked Loop
(Synchronize to External CLK)
Pulse-Skipping at Light Loads
No Current Reversal Allowed
between the output and the I
FB
IN
R2
R1
, the BOOST pin will draw
+
3836 F11
D
D
FB1
FB2
V
OUT
OUT
= 0V),
3836fa
TH

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