LTC3831 LINER [Linear Technology], LTC3831 Datasheet - Page 13

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LTC3831

Manufacturer Part Number
LTC3831
Description
High Power Synchronous Switching Regulator Controller for DDR Memory Termination
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIO S I FOR ATIO
Power MOSFETs
Two N-channel power MOSFETs are required for most
LTC3831 circuits. These should be selected based prima-
rily on threshold voltage and on-resistance considerations.
Thermal dissipation is often a secondary concern in high
efficiency designs. The required MOSFET threshold should
be determined based on the available power supply volt-
ages and/or the complexity of the gate drive charge pump
scheme. In 3.3V input designs where an auxiliary 12V
supply is available to power PV
MOSFETs with R
used with good results. The current drawn from this sup-
ply varies with the MOSFETs used and the LTC3831’s
operating frequency, but is generally less than 50mA.
LTC3831 applications that use 5V or lower V
doubling/tripling charge pumps to generate PV
PV
enhance standard power MOSFETs. Under this condition,
the effective MOSFET R
the dissipation in the FETs and reducing efficiency. Logic-
level FETs are the recommended choice for 5V or lower
voltage systems. Logic-level FETs can be fully enhanced
with a doubler/tripling charge pump and will operate at
maximum efficiency.
CC2
, do not provide enough gate drive voltage to fully
+
DS(ON)
4.7 F
C1
33pF
U
0.1 F
specified at V
DS(ON)
1 F
SHDN
U
R
15k
C
C
1500pF
0.01 F
130k
C
may be quite high, raising
CC1
V
SS
FREQSET
SHDN
COMP
PV
CC
W
and PV
CC2
GS
Figure 8. Typical Application with V
LTC3831
5V
R
= 5V or 6V can be
PV
PGND
I
GND
CC1
IN
MAX
CC2
I
BG
TG
R
FB
FB
MBR0530T1
+
voltage and
U
, standard
CC1
and
10k
C
C
Q1, Q2: SILICONIX Si4410DY
IN
OUT
: SANYO POSCAP 6TPB330M
: SANYO POSCAP 4TPB470M
After the MOSFET threshold voltage is selected, choose
the R
allowable power dissipation and maximum output cur-
rent. In a typical LTC3831 circuit operating in continuous
mode, the average inductor current is equal to the output
load current. This current flows through either Q1 or Q2
with the power dissipation split up according to the duty
cycle:
The R
be calculated by rearranging the relation P = I
P
efficiency or allowable thermal dissipation. A typical high
R
R
MAX
DS ON Q
DS ON Q
0.1 F
1k
DC Q
DC Q
(
(
DS(ON)
DS(ON)
( )
(
should be calculated based primarily on required
TT
)
)
1
2
= 0.6 • V
0.1 F
1
2
)
based on the input voltage, the output voltage,
V
2.5V
required for a given conduction loss can now
DDQ
V
1
DC Q
DC Q
Q2
Q1
V
OUT
IN
( ) • (
(
V
DDQ
P
V
P
OUT
MAX Q
1
IN
MAX Q
2
) • (
MBRS340T3
MBRS340T3
1.2 H
L
( )
I
(
O
LOAD
I
LOAD
1
2
V
)
IN
+
)
V
)
2
2
IN
V
C
470 F
OUT
OUT
3
V
(
V
OUT
V
+
IN
IN
2k
1%
10k
1%
3831 F08
V
C
330 F
V
1.5V
P
• (
IN
IN
2
TT
6A
MAX Q
V
LTC3831
I
LOAD
OUT
P
( )
MAX Q
2
) • (
1
R.
)
2
(
13
I
LOAD
2
)
3831f
)
2

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