LTC3728L LINER [Linear Technology], LTC3728L Datasheet - Page 21
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LTC3728L
Manufacturer Part Number
LTC3728L
Description
Dual, 550kHz, 2-Phase Synchronous Regulators
Manufacturer
LINER [Linear Technology]
Datasheet
1.LTC3728L.pdf
(32 pages)
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APPLICATIO S I FOR ATIO
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
external and internal oscillators. This type of phase detec-
tor will not lock up on input frequencies close to the
harmonics of the VCO center frequency. The PLL hold-in
range, f
The output of the phase detector is a complementary pair
of current sources charging or discharging the external
filter network on the PLLFLTR pin. A simplified block
diagram is shown in Figure 7.
If the external frequency (f
lator frequency f
pulling up the PLLFLTR pin. When the external frequency
is less than f
down the PLLFLTR pin. If the external and internal fre-
quencies are the same but exhibit a phase difference, the
current sources turn on for an amount of time correspond-
ing to the phase difference. Thus the voltage on the
PLLFLTR pin is adjusted until the phase and frequency of
the external and internal oscillators are identical. At this
stable operating point the phase comparator output is
open and the filter capacitor C
PLLIN pin must be driven from a low impedance source
such as a logic gate located close to the pin. When using
multiple ICs for a phase-locked system, the PLLFLTR pin
of the master oscillator should be biased at a voltage that
will guarantee the slave oscillator(s) ability to lock onto the
master’s frequency. A DC voltage of 0.7V to 1.7V applied
to the master oscillator’s PLLFLTR pin is recommended in
order to meet this requirement. The resultant operating
frequency can range from 300kHz to 500kHz.
The loop filter components (C
current pulses from the phase detector and provide a
stable input to the voltage controlled oscillator. The filter
components C
acquires lock. Typically R
0.1 F.
f
H
= f
H
, is equal to the capture range, f
C
= 0.5 f
0SC
LP
, current is sunk continuously, pulling
0SC
and R
U
, current is sourced continuously,
O
(260kHz-550kHz)
LP
U
LP
PLLIN
determine how fast the loop
=10k and C
LP
) is greater than the oscil-
holds the voltage. The IC’s
LP
, R
W
LP
) smooth out the
LP
C:
is 0.01 F to
U
Minimum On-Time Considerations
Minimum on-time t
that each controller is capable of turning on the top
MOSFET. It is determined by internal timing delays and the
gate charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that
If the duty cycle falls below what can be accommodated by
the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for each controller is approximately
100ns. However, as the peak sense voltage decreases the
minimum on-time gradually increases up to about 150ns.
This is of particular concern in forced continuous applica-
tions with low ripple current at light loads. If the duty cycle
drops below the minimum on-time limit in this situation,
a significant amount of cycle skipping can occur with
correspondingly larger current and voltage ripple.
FCB Pin Operation
The FCB pin can be used to regulate a secondary winding
or as a logic level input. Continuous operation is forced on
both controllers when the FCB pin drops below 0.8V.
During continuous mode, current flows continuously in
the transformer primary. The secondary winding(s) draw
current only when the bottom, synchronous switch is on.
When primary load currents are low and/or the V
ratio is low, the synchronous switch may not be on for a
sufficient amount of time to transfer power from the
output capacitor to the secondary load. Forced continuous
operation will support secondary windings providing there
is sufficient synchronous switch duty factor. Thus, the
FCB input pin removes the requirement that power must
be drawn from the inductor primary in order to extract
t
ON MIN
(
)
LTC3728L/LTC3728LX
V
V f
IN
OUT
( )
ON(MIN)
is the smallest time duration
IN
21
/V
3728lxfa
OUT