LTC3708 LINER [Linear Technology], LTC3708 Datasheet - Page 24

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LTC3708

Manufacturer Part Number
LTC3708
Description
Fast 2-Phase, No RSENSE Buck Controller with Output Tracking
Manufacturer
LINER [Linear Technology]
Datasheet

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0
LTC3708
APPLICATIONS INFORMATION
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3708. These items are also illustrated graphically in
Figure 14. Figure 15 further shows the current waveforms
present in the various branches of the 2-phase synchronous
Buck regulators operating in the continuous mode.
• Place the loop of M1, M3 and C
• Place C
• Connect the negative plates of C
24
V
OUT1
2.5V
10A
This loop conducts high pulsating current and its area
needs to be minimized. Place M2, M4 and C
same way.
distance may cause a large resonant loop.
before it joins PGND2 at the ground plane. Connect
C
are separated before they meet at a single point.
22μF
6.3V
X7R
OUT2
and C
+
IN1
PGND1
C
470μF
4V
and C
OUT1
DR2
C
C
L1, L2: SUMIDA CEP125-1R0M
M1, M2: VISHAY Si4884
M3, M4: VISHAY Si4874
IN
OUT1
56pF
20k
1%
10k
1%
in the same way so that power grounds
: UNITED CHEMI-CON THCR60EIH106ZT
IN2
, C
OUT2
within the distance of 1cm. Longer
7V TO 28V
Figure 13. Design Example: 2.5V/10A and 1.8V/10A at 500kHz with Output Tracking
R2
10k
1%
: SANYO POSCAP 4TPD470M
1μH
B340A
V
L1
31.6k
1%
IN
V
IN
OUT1
715k
C
10μF
35V
IN
4
IN1
M1
M3
100pF
and C
in a compact area.
0.01μF
BAT54A
V
RNG2
BOOST2
0.22μF
DR1
1μF
to PGND1
20k
IN2
V
27
28
26
25
22
24
23
32
29
3
6
9
2
680pF
CC
TG1
BOOST1
SW1
SENSE1
BG1
SENSE1
PGND1
V
I
V
TRACK2
EXTLPF
I
V
ON1
TH1
RNG1
FB1
in the
CC
RUN/SS
17
10Ω
TRACK1 FCB DRV
LTC3708EUH
1
+
+
0.1μF
4
4.7μF
• Cover the board area under the LTC3708 with a SGND
• Run SENSE
• Keep the high dV/dt nodes SW, TG and BOOST away
31
SGND
SENSE2
SENSE2
BOOST2
PWRGD
PGND2
INTLPF
V
5
RNG2
SW2
plane. For the LTC3708EUH, solder the back of the IC
to this plane. Separate SGND from the power ground
and connect all signal components (I
EXTLPF , INTLPF , V
SGND plane before it joins PGND. Connect SGND to
the gound plane at a single point.
(or R
is used) with Kelvin connection (Figure 16). Route
SENSE
separation. The fi lter capacitor (when used) between
SENSE
as possible.
from sensitive small-signal nodes.
V
I
TG2
BG2
I
ON2
TH2
FB2
21
CC
1μF
+
14
13
15
16
20
18
19
11
12
7
30
10
8
5V
SENSE
PGND1
100pF
BOOST2
20k
+
+
680pF
1μF
and SENSE
and SENSE
0.22μF
+
when a separate current sensing resistor
and SENSE
0.022μF
511k
M4
M2
0.01μF
10k
RNG
V
IN
should be as close to the LTC3708
together with minimum PC trace
V
1nF
CC
, TRACK and RUN/SS) to the
B340A
39k
11k
across the bottom MOSFET
1μH
L2
3708 F13
10k
1%
20k
1%
TH
+
56pF 5V
, V
C
470μF
4V
FB
OUT2
, I
100k
ON
PGOOD
22μF
6.3V
X7R
, V
V
1.8V
10A
OUT1
3708fb
CC
,

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