LTC3611EWP LINER [Linear Technology], LTC3611EWP Datasheet - Page 17

• Manufacturer Part Number: LTC3611EWP
• Description: 10A, 32V Monolithic Synchronous Step-Down DC/DC Converter
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
4. C
the large RMS input current to the regulator. It must have
a very low ESR to minimize the AC I
capacitance to prevent the RMS current from causing ad-
ditional upstream losses in fuses or batteries.
Other losses, including C
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If
you make a change and the input current decreases, then
the efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to ΔI
resistance of C
charge C
regulator to return V
this recovery time, V
or ringing that would indicate a stability problem. The I
pin external components shown in Figure 6 will provide
adequate compensation for most applications. For a
detailed explanation of switching control loop theory see
Application Note 76.
Design Example
As a design example, take a supply with the following
specifications: V
2.5V ±5%, I
the timing resistor with V
and choose the inductor for about 40% ripple current at
the maximum V
R
L =
IN
ON
loss. The input capacitor has the difficult job of filtering
(
=
550kHz
OUT
(2.4) 550kHz
LOAD
OUT(MAX)
generating a feedback error signal used by the
(
2.5V
OUT
)
IN
(ESR), where ESR is the effective series
( )
IN
0.4
:
2.5V
. ΔI
= 5V to 36V (12V nominal), V
OUT
OUT
OUT
= 10A, f = 550kHz. First, calculate
LOAD
(
10A
)
immediately shifts by an amount
OUT
to its steady-state value. During
(
can be monitored for overshoot
ON
10pF
also begins to charge or dis-
)
ESR loss, Schottky diode D1
= V
1
)
OUT
=187k
2.5V
36V
2
:
R loss and sufficient
= 1μH
OUT
TH
=
Selecting a standard value of 1μH results in a maximum
ripple current of:
Next, set up V
V
tying V
10A. C
at 85°C. The output capacitors are chosen for a low ESR
of 0.013Ω to minimize output voltage changes due to
inductor ripple current and load steps. The ripple voltage
will be only:
However, a 0A to 10A load step will cause an output
change of up to:
An optional 22μF ceramic output capacitor is included
to minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 6.
PC Board Layout Checklist
When laying out a PC board follow one of the two sug-
gested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents,
a multilayer board is recommended to help with heat
sinking of power components.
• The ground plane layer should not have any traces and
• Place C
• Keep small-signal components close to the LTC3611.
• Ground connections (including LTC3611 SGND and
RNG
ΔV
ΔV
it should be as close as possible to the layer with the
LTC3611.
the LTC3611. It may help to have some components
on the bottom side of the board.
PGND) should be made through immediate vias to
the ground plane. Use several larger vias for power
components.
I
L
OUT(RIPPLE)
OUT(STEP)
to 1V will set the typical current limit to 15A, and
IN
=
RNG
is chosen for an RMS current rating of about 5A
(
550kHz
IN
to GND will result in a typical current around
and C
2.5V
= ΔI
RNG
= ΔI
= (3.6A) (0.013Ω) = 47mV
)
OUT
LOAD
(
1μH
voltage and check the I
L(MAX)
all in one compact area, close to
)
(ESR) = (10A) (0.013Ω) =130mV
1–
(ESR)
2.5V
12V
= 3.6A
LTC3611
LIMIT
17
. Tying
3611fb