LTC3412 LINER [Linear Technology], LTC3412 Datasheet - Page 11

• Manufacturer Part Number: LTC3412
• Description: 2.5A, 4MHz, Monolithic Synchronous Step-Down Regulator
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input,
V
mistaken as loop instability. At worst, a sudden inrush of
current through the long wires can potentially cause a
voltage spike at V
Output Voltage Programming
The output voltage is set by an external resistive divider
according to the following equation:
The resistive divider allows the V
of the output voltage as shown in Figure 2.
Burst Clamp Programming
If the voltage on the SYNC/MODE pin is less than V
Burst Mode operation is enabled. During Burst Mode
operation, the voltage on the SYNC/MODE pin determines
the burst clamp level which sets the minimum peak
inductor current, I
ing to the following equation:
V
be programmed in the range of 0A to 3.75A. For values of
V
of V
load current drops, the peak inductor current decreases to
keep the output voltage in regulation. When the output
load current demands a peak inductor current that is less
than I
IN
BURST
BURST
I
V
. At best, this ringing can couple to the output and be
BURST
BURST
OUT
BURST
is the voltage on the SYNC/MODE pin. I
greater than 1V, I
=
less than 0.2V, I
=
0 8
, the burst clamp will force the peak inductor
.
Figure 2. Setting the Output Voltage
(
V
V
BURST
⎛
⎜
⎝
1
IN
BURST
+
U
large enough to damage the part.
R
R
LTC3412
−
2
1
, for each switching cycle accord-
0 2
⎞
⎟
⎠
BURST
.
BURST
U
SGND
V
3412 F02
V
)
FB
⎛
⎜
⎝
3 75
is set at 3.75A. For values
0 8
is set at 0A. As the output
FB
.
V
.
OUT
pin to sense a fraction
V
W
A
R2
R1
⎞
⎟
⎠
BURST
U
IN
by 1V,
can
current to remain equal to I
reductions in the load current. Since the average inductor
current is greater than the output load current, the voltage
on the I
150mV, sleep mode is enabled in which both power
MOSFETs are shut off along with most of the circuitry to
minimize power consumption. All circuitry is turned back
on and the power MOSFETs begin switching again when
the output voltage drops out of regulation. The value for
I
voltage ripple. As the value of I
period between pulses and the output voltage ripple in-
crease. The burst clamp voltage, V
resistor divider from the V
in Figure 1.
Pulse skipping, which is a compromise between low out-
put voltage ripple and efficiency, can be implemented by
connecting the SYNC/MODE pin to ground. This sets I
to 0A. In this condition, the peak inductor current is limited
by the minimum on-time of the current comparator, and
the lowest output voltage ripple is achieved while still op-
erating discontinuously. During very light output loads,
pulse skipping allows only a few switching cycles to be
skipped while maintaining the output voltage in regulation.
Frequency Synchronization
The LTC3412’s internal oscillator can be synchronized to
an external clock signal. During synchronization, the top
MOSFET turn-on is locked to the falling edge of the
external frequency source. The synchronization frequency
range is 300kHz to 4MHz. Synchronization only occurs if
the external frequency is greater than the frequency set by
the external resistor. Because slope compensation is
generated by the oscillator’s RC circuit, the external fre-
quency should be set 25% higher than the frequency set
by the external resistor to ensure that adequate slope
compensation is present.
Soft-Start
The RUN/SS pin provides a means to shut down the
LTC3412 as well as a timer for soft-start. Pulling the
RUN/SS pin below 0.5V places the LTC3412 in a low
quiescent current shutdown state (I
BURST
TH
is determined by the desired amount of output
pin will decrease. When the I
FB
pin to the SGND pin as shown
BURST
BURST
BURST
regardless of further
Q
increases, the sleep
< 1μA).
TH
LTC3412
, can be set by a
voltage drops to
11
BURST
3412fb