LTC3410-1.875 LINER [Linear Technology], LTC3410-1.875 Datasheet - Page 10

• Manufacturer Part Number: LTC3410-1.875
• Description: 2.25MHz, 300mA Synchronous Step-Down Regulator in SC70
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
LTC3410-1.875
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3410-1.875 circuits: V
and I
the efficiency loss at very low load currents whereas the
I
load currents. In a typical efficiency plot, the efficiency
curve at very low load currents can be misleading since the
actual power lost is of no consequence as illustrated in
Figure 2.
1. The V
10
2
R loss dominates the efficiency loss at medium to high
Efficiency = 100% – (L1 + L2 + L3 + ...)
the DC bias current as given in the electrical character-
istics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
2
R losses. The V
IN
quiescent current is due to two components:
U
IN
quiescent current loss dominates
U
W
IN
quiescent current
0.00001
0.0001
0.001
0.01
0.1
Figure 2. Power Loss vs Load Current
1
0.1
U
V
IN
= 3.6V
1
LOAD CURRENT (mA)
10
2. I
Other losses including C
losses and inductor core losses generally account for less
than 2% total additional loss.
switched from high to low to high again, a packet of
charge, dQ, moves from V
dQ/dt is the current out of V
the DC bias current. In continuous mode,
I
gate charges of the internal top and bottom
switches. Both the DC bias and gate charge
losses are proportional to V
be more pronounced at higher supply voltages.
internal switches, R
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R
(DC) as follows:
The R
be obtained from the Typical Performance Characteris-
tics curves. Thus, to obtain I
to R
output current.
GATECHG
2
R losses are calculated from the resistances of the
R
100
L
SW
and multiply the result by the square of the average
DS(ON)
34101875 F02
= (R
1000
= f(Q
DS(ON)TOP
for both the top and bottom MOSFETs can
T
+ Q
SW
)(DC) + (R
B
, and external inductor R
) where Q
IN
IN
and C
IN
IN
2
DS(ON)
that is typically larger than
R losses, simply add R
to ground. The resulting
and thus their effects will
DS(ON)BOT
OUT
T
and the duty cycle
and Q
ESR dissipative
)(1 – DC)
B
are the
34101875f
L
. In
SW