LTC3407A LINER [Linear Technology], LTC3407A Datasheet - Page 11

• Manufacturer Part Number: LTC3407A
• Description: Dual Synchronous 600mA, 1.5MHz Step-Down DC/DC Regulator
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
During this recovery time, V
shoot or ringing that would indicate a stability problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second-
order overshoot/DC ratio cannot be used to determine
phase margin. In addition, a feed-forward capacitor can be
added to improve the high frequency response, as shown
in Figure 1. Capacitors C1 and C2 provide phase lead by
creating high frequency zeros with R2 and R4 respectively,
which improve the phase margin.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a re-
view of control loop theory, refer to Application Note 76.
In some applications, a more severe transient can be caused
by switching in loads with large (>1μF) input capacitors.
The discharged input capacitors are effectively put in paral-
lel with C
can deliver enough current to prevent this problem, if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap™ controller is designed
specifi cally for this purpose and usually incorporates cur-
rent limiting, short-circuit protection, and soft-starting.
Soft-Start
The RUN/SS pins provide a means to separately run or shut
down the two regulators. In addition, they can optionally be
used to externally control the rate at which each regulator
starts up and shuts down. Pulling the RUN/SS1 pin below
1V shuts down regulator 1 on the LTC3407A. Forcing this
pin to V
at which each regulator turns on and off, connect a resistor
and capacitor to the RUN/SS pins as shown in Figure 1.
The soft-start duration can be calculated by using the
following formula:
For approximately a 1ms ramp time, use R
and C
Hot Swap is a registered trademark of Linear Technology Corporation.
t
SS
SS
= R
IN
= 680pF at V
OUT
enables regulator 1. In order to control the rate
SS
, causing a rapid drop in V
C
SS
In
V
IN
IN
V
IN
= 3.3V.
1.6
OUT
1
can be monitored for over-
(s)
OUT
. No regulator
SS
= 4.7MΩ
Effi ciency Considerations
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Percent effi ciency can
be expressed as:
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, 4 main sources usually account for most of the
losses in LTC3407A circuits: 1) V
switching losses, 3) I
1) The V
2) The switching current is the sum of the MOSFET driver
3) I
%Effi ciency = 100% - (L1 + L2 + L3 + ...)
Electrical Characteristics which excludes MOSFET
driver and control currents. V
small (<0.1%) loss that increases with V
load.
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from V
out of V
current. In continuous mode, I
where Q
top and bottom MOSFET switches. The gate charge
losses are proportional to V
will be more pronounced at higher supply voltages.
the internal switches, R
In continuous mode, the average output current fl ows
through inductor L, but is “chopped” between the internal
top and bottom switches. Thus, the series resistance
looking into the SW pin is a function of both top and
bottom MOSFET R
follows:
R
2
SW
R losses are calculated from the DC resistances of
= (R
IN
IN
IN
current is the DC supply current given in the
T
DS(ON)TOP
to ground. The resulting dQ/dt is a current
that is typically much larger than the DC bias
and Q
B
are the gate charges of the internal
2
)(D) + (R
DS(ON)
R losses, 4) other losses.
SW
, and external inductor, R
and the duty cycle (D) as
DS(ON)BOT
IN
IN
GATECHG
IN
and thus their effects
quiescent current, 2)
LTC3407A
current results in a
)(1 – D)
= f
IN
O
, even at no
(Q
T
11
+ Q
3407afa
B
L
),
.