LTC3210EPD-1-PBF LINER [Linear Technology], LTC3210EPD-1-PBF Datasheet - Page 12

• Manufacturer Part Number: LTC3210EPD-1-PBF
• Manufacturer: LINER [Linear Technology]

LTC3210-1
APPLICATIONS INFORMATION
12
V
The style and value of the capacitors used with the
LTC3210-1 determine several important parameters such
as regulator control loop stability, output ripple, charge
pump strength and minimum start-up time.
To reduce noise and ripple, it is recommended that low
equivalent series resistance (ESR) ceramic capacitors are
used for both CV
capacitors are not recommended due to high ESR.
The value of C
ripple for a given load current. Increasing the size of C
will reduce output ripple at the expense of higher start-up
current. The peak-to-peak output ripple of the 1.5x mode
is approximately given by the expression:
cally 800kHz and C
The output ripple in 2x mode is very small due to the fact
that load current is supplied on both cycles of the clock.
Both style and value of the output capacitor can signifi -
cantly affect the stability of the LTC3210-1. As shown in
the Block Diagram, the LTC3210-1 uses a control loop
to adjust the strength of the charge pump to match the
required output current. The error signal of the loop is
stored directly on the output capacitor. The output capacitor
also serves as the dominant pole for the control loop. To
prevent ringing or instability, it is important for the output
capacitor to maintain at least 1.3μF of capacitance over
all conditions.
Where f
V
BAT
RIPPLE P P
, CPO Capacitor Selection
OSC
(
−
is the LTC3210-1 oscillator frequency or typi-
)
=
CPO
(
3
BAT
f
directly controls the amount of output
OSC
CPO
I
OUT
and C
•
is the output storage capacitor.
C
CPO
CPO
)
. Tantalum and aluminum
CPO
(3)
In addition, excessive output capacitor ESR >100mΩ will
tend to degrade the loop stability. Multilayer ceramic chip
capacitors typically have exceptional ESR performance and
when combined with a tight board layout will result in very
good stability. As the value of C
output ripple, the value of CV
ripple present at the input pin(V
current will be relatively constant while the charge pump is
either in the input charging phase or the output charging
phase but will drop to zero during the clock nonoverlap
times. Since the nonoverlap time is small (~35ns), these
missing “notches” will result in only a small perturbation
on the input power supply line. Note that a higher ESR
capacitor such as tantalum will have higher input noise
due to the higher ESR. Therefore, ceramic capacitors are
recommended for low ESR. Input noise can be further
reduced by powering the LTC3210-1 through a very small
series inductor as shown in Figure 5. A 10nH inductor
will reject the fast current notches, thereby presenting a
nearly constant current load to the input power supply.
For economy, the 10nH inductor can be fabricated on the
PC board with about 1cm (0.4") of PC board trace.
Figure 5. 10nH Inductor Used for Input Noise
Reduction (Approximately 1cm of Board Trace)
BAT
BAT
CPO
V
GND
BAT
). The LTC3210-1’s input
controls the amount of
controls the amount of
LTC3210-1
32101 F05
32101fc