LTC2630-HM10 LINER [Linear Technology], LTC2630-HM10 Datasheet - Page 12

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LTC2630-HM10

Manufacturer Part Number
LTC2630-HM10
Description
Single 12-/10-/8-Bit Rail-to-Rail DACs with Integrated Reference in SC70
Manufacturer
LINER [Linear Technology]
Datasheet
PIN FUNCTIONS
BLOCK DIAGRAM
LTC2630
⎯ C ⎯ S /LD (Pin 1): Serial Interface Chip Select/Load Input.
When ⎯ C ⎯ S /LD is low, SCK is enabled for shifting data on
SDI into the register. When ⎯ C ⎯ S /LD is taken high, SCK
is disabled and the specifi ed command (see Table 1) is
executed.
SCK (Pin 2): Serial Interface Clock Input. CMOS and TTL
compatible.
SDI (Pin 3): Serial Interface Data Input. Data on SDI
is clocked into the DAC on the rising edge of SCK. The
LTC2630 accepts input word lengths of either 24 or 32
bits.
12
CS/LD
SDI
SCK
REGISTER
24-BIT
SHIFT
REGISTER
INPUT
DECODE LOGIC
CONTROL
REFERENCE
INTERNAL
REGISTER
DAC
V
(LTC2630-L) or 4.5V ≤ V
used as the reference input when the part is programmed
to operate in supply as reference mode. Bypass to GND
with a 0.1μF capacitor.
GND (Pin 5): Ground.
V
CC
OUT
(Pin 4): Supply Voltage Input. 2.7V ≤ V
(Pin 6): DAC Analog Voltage Output.
RESISTOR
DIVIDER
DACREF
GND
DAC
V
CC
V
CC
OUT
2630 BD
≤ 5.5V (LTC2630-H). Also
CC
≤ 5.5V
2630f

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