LTC2448 LINER [Linear Technology], LTC2448 Datasheet - Page 5
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LTC2448
Manufacturer Part Number
LTC2448
Description
24-Bit High Speed 8-/16-Channel ADCs with Selectable Speed/Resolution
Manufacturer
LINER [Linear Technology]
Datasheet
1.LTC2448.pdf
(28 pages)
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PI FU CTIO S
TI I G CHARACTERISTICS
range, otherwise specifications are at T
SYMBOL
D
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: V
V
V
Note 4: F
f
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
GND (Pins 1, 4, 5, 6, 31, 32, 33): Ground. Multiple
ground pins internally connected for optimum ground
current flow and V
these pins to a common ground plane through a low
impedance connection. All 7 pins must be connected to
ground for proper operation.
BUSY (Pin 2): Conversion in Progress Indicator. This pin
is HIGH while the conversion is in progress and goes LOW
indicating the conversion is complete and data is ready. It
remains LOW during the sleep and data output states. At
the conclusion of the data output state, it goes HIGH
indicating a new conversion has begun.
ESCK
LESCK
HESCK
DOUT_ISCK
DOUT_ESCK
1
2
3
4
KQMAX
KQMIN
5
6
7
8
EOSC
REF
IN
ISCK
W U
= IN
U
= REF
= 10MHz unless otherwise specified.
+
O
CC
– IN
pin tied to GND or to external conversion clock source with
+
= 4.5V to 5.5V unless otherwise specified.
– REF
U
–
, V
PARAMETER
Internal SCK Duty Cycle
External SCK Frequency Range
External SCK Low Period
External SCK High Period
Internal SCK 32-Bit Data Output Time
External SCK 32-Bit Data Output Time
CS ↓ to SDO Low Z
CS ↑ to SDO High Z
CS ↓ to SCK ↓
CS ↓ to SCK ↑
SCK ↓ to SDO Valid
SDO Hold After SCK ↓
SCK Set-Up Before CS ↓
SCK Hold After CS ↓
SDI Setup Before SCK ↑
SDI Hold After SCK ↑
INCM
–
, V
REFCM
= (IN
CC
U
+
= (REF
+ IN
decoupling. Connect each one of
–
)/2.
+
+ REF
–
)/2;
A
= 25°C. (Note 3)
The
CONDITIONS
(Note 9)
(Note 8)
(Note 8)
(Note 8)
Internal Oscillator (Notes 9, 11)
External Oscillator (Notes 9, 10)
(Note 8)
(Note 12)
(Note 12)
(Note 9)
(Notes 8, 12)
(Note 5)
(Note 5)
(Note 5)
●
denotes specifications which apply over the full operating temperature
Note 7: The converter uses the internal oscillator.
Note 8: The converter is in external SCK mode of operation such that the
SCK pin is used as a digital input. The frequency of the clock signal driving
SCK during the data output is f
Note 9: The converter is in internal SCK mode of operation such that the
SCK pin is used as a digital output. In this mode of operation, the SCK pin
has a total equivalent load capacitance of C
Note 10: The external oscillator is connected to the F
oscillator frequency, f
Note 11: The converter uses the internal oscillator. F
Note 12: Guaranteed by design and test correlation.
Note 13: There is an internal reset that adds an additional 1µs (typ) to the
conversion time.
EXT (Pin 3): Internal/External SCK Selection Pin. This pin
is used to select internal or external SCK for outputting/
inputting data. If EXT is tied low, the device is in the
external SCK mode and data is shifted out of the device
under the control of a user applied serial clock. If EXT is
tied high, the internal serial clock mode is selected. The
device generates its own SCK signal and outputs this on
the SCK pin. A framing signal BUSY (Pin 2) goes low
indicating data is being output.
COM (Pin 7): The common negative input (IN
single ended multiplexer configurations. The voltage on
CH0-CH15 and COM pins can have any value between
EOSC
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
LTC2444/LTC2445/
, is expressed in Hz.
LTC2448/LTC2449
ESCK
41.6
MIN
45
25
25
25
15
50
10
10
0
0
and is expressed in Hz.
320/f
32/f
LOAD
35.3
TYP
5
ESCK
EOSC
= 20pF.
O
O
= 0V.
pin. The external
MAX
30.9
sn2444589 2444589fs
55
20
25
25
25
50
–
) for all
UNITS
5
MHz
ns
ns
µs
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
%
s
s