LTC2292 LINER [Linear Technology], LTC2292 Datasheet - Page 11

• Manufacturer Part Number: LTC2292
• Description: Dual 12-Bit, 65/40/25Msps Low Power 3V ADCs
• Manufacturer: LINER [Linear Technology]

PI FU CTIO S
A
Input.
A
Input.
REFHA (Pins 3, 4): Channel A High Reference. Short
together and bypass to Pins 5, 6 with a 0.1µF ceramic chip
capacitor as close to the pin as possible. Also bypass to
Pins 5, 6 with an additional 2.2µF ceramic chip capacitor
and to ground with a 1µF ceramic chip capacitor.
REFLA (Pins 5, 6): Channel A Low Reference. Short
together and bypass to Pins 3, 4 with a 0.1µF ceramic chip
capacitor as close to the pin as possible. Also bypass to
Pins 3, 4 with an additional 2.2µF ceramic chip capacitor
and to ground with a 1µF ceramic chip capacitor.
V
GND with 0.1µF ceramic chip capacitors.
CLKA (Pin 8): Channel A Clock Input. The input sample
starts on the positive edge.
CLKB (Pin 9): Channel B Clock Input. The input sample
starts on the positive edge.
REFLB (Pins 11, 12): Channel B Low Reference. Short
together and bypass to Pins 13, 14 with a 0.1µF ceramic
TYPICAL PERFOR A CE CHARACTERISTICS
INA
INA
DD
120
110
100
90
80
70
60
50
40
30
20
U
–60
+
–
(Pins 7, 10, 18, 63): Analog 3V Supply. Bypass to
LTC2291: SFDR vs Input Level,
f
IN
(Pin 2): Channel A Negative Differential Analog
(Pin 1): Channel A Positive Differential Analog
= 5MHz, 2V Range, 25Msps
–50
U
INPUT LEVEL (dBFS)
– 40
dBFS
dBc
–30
U
90dBc SFDR
REFERENCE LINE
–20
W
–10
229321 G45
U
0
70
60
50
40
30
0
LTC2291: I
5MHz Sine Wave Input, –1dB
5
10
SAMPLE RATE (Msps)
VDD
2V RANGE
15
vs Sample Rate,
1V RANGE
chip capacitor as close to the pin as possible. Also bypass
to Pins 13, 14 with an additional 2.2µF ceramic chip ca-
pacitor and to ground with a 1µF ceramic chip capacitor.
REFHB (Pins 13, 14): Channel B High Reference. Short
together and bypass to Pins 11, 12 with a 0.1µF ceramic
chip capacitor as close to the pin as possible. Also bypass
to Pins 11, 12 with an additional 2.2µF ceramic chip ca-
pacitor and to ground with a 1µF ceramic chip capacitor.
A
Input.
A
Input.
GND (Pins 17, 64): ADC Power Ground.
SENSEB (Pin 19): Channel B Reference Programming Pin.
Connecting SENSEB to V
and a ±0.5V input range. V
and a ±1V input range. An external reference greater than
0.5V and less than 1V applied to SENSEB selects an input
range of ±V
V
Mode Bias. Bypass to ground with 2.2µF ceramic chip
capacitor. Do not connect to V
LTC2293/LTC2292/LTC2291
INB
INB
CMB
20
+
–
(Pin 20): Channel B 1.5V Output and Input Common
25
(Pin 15): Channel B Negative Differential Analog
(Pin 16): Channel B Positive Differential Analog
30
229321 G46
SENSEB
35
. ±1V is the largest valid input range.
CMB
6
4
2
0
0
DD
LTC2291: I
5MHz Sine Wave Input, –1dB,
O
VDD
selects the internal reference
selects the internal reference
5
CMA
= 1.8V
10
SAMPLE RATE (Msps)
.
OVDD
15
vs Sample Rate,
20
25
11
30
229321 G47
229321f
35