LT1943 LINER [Linear Technology], LT1943 Datasheet - Page 10

• Manufacturer Part Number: LT1943
• Description: High Current Quad Output Regulator for TFT LCD Panels
• Manufacturer: LINER [Linear Technology]

OPERATIO
LT1943
The LT1943 is a highly integrated power supply IC con-
taining four separate switching regulators. All four switch-
ers have their own oscillator with frequency foldback and
use current mode control. Switching regulator 1 consists
of a step-down regulator with a current limit of 2.4A.
Switching regulator 2 is a boost regulator with a current
limit of 2.6A and switchers 3 and 4 are 0.35A boost
regulators. Switching regulator 4 has two feedback pins
(FB4 and NFB4) and can directly regulate positive or
negative output voltages.
When power is applied to V
charging and when its voltage reaches 0.8V, switcher 1 is
enabled. (See Figure 2) The RUN-SS pin is used for soft-
start and limits the ramp-rate for V
capacitor at the RUN-SS pin will cause V
more slowly. Switching regulators 2, 3 and 4 are driven by
the BIAS pin which must be connected to V
is the first to come up and when it reaches 2.8V, the SS-
234 pin will begin charging to enable switches 2, 3 and 4.
AV
determined by the capacitor tied to the SS-234 pin. When
AV
voltage, the PGOOD pin will be pulled low. When all
outputs reach 90% of their programmed voltages, the C
timer will trigger and a 20 A current source begins to
charge the C
output disconnect PNP turns on, connecting V
event of any of the 4 outputs dropping below 10% of its
normal voltage, PanelProtect circuitry pulls the C
ground, disabling V
When needed, the PGOOD pin can be used to drive the gate
of a P-channel MOSFET that functions as output discon-
nect for AV
must be pulled to ground.
10
DD
DD
and V
reaches approximately 90% of its programmed
OFF
DD
T
. For complete shutdown, the RUN-SS pin
will then begin rising and their ramp rate is
pin. When the C
U
ON
.
IN
, the RUN-SS pin starts
T
pin reaches 1.1V, the
LOGIC
. Using a larger
LOGIC
LOGIC
ON
. V
to start
T
. In the
pin to
LOGIC
T
500mA/DIV
500mA/DIV
RUN-SS
20V/DIV
20V/DIV
10V/DIV
20V/DIV
50V/DIV
PGOOD
SS-234
2V/DIV
2V/DIV
V
5V/DIV
1A/DIV
2V/DIV
1A/DIV
I
LOGIC
AV
L2+L3
V
V
V
V
OFF
I
I
I
DD
ON
L1
L4
E3
L5
CT
Figure 3. LT1943 Power-Up Sequence. (Traces From
Both Photos are Synchronized to the Same Trigger)
5ms/DIV
5ms/DIV
(3a)
(3b)
1943 F03a
1943 F03b
1943i