LT1782HS5 LINER [Linear Technology], LT1782HS5 Datasheet - Page 11

• Manufacturer Part Number: LT1782HS5
• Description: Micropower, Over-The-Top SOT-23, Rail-to-Rail Input and Output Op Amp
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
Supply Voltage
The positive supply pin of the LT1782 should be bypassed
with a small capacitor (typically 0.1 F) within an inch of
the pin. When driving heavy loads, an additional 4.7 F
electrolytic capacitor should be used. When using split
supplies, the same is true for the negative supply pin.
The LT1782 is protected against reverse battery voltages
up to 18V. In the event a reverse battery condition occurs,
the supply current is typically less than 1nA.
Inputs
The LT1782 has two input stages, NPN and PNP (see the
Simplified Schematic), resulting in three distinct operat-
ing regions as shown in the Input Bias Current vs Common
Mode typical performance curve.
For input voltages about 0.8V or more below V
input stage is active and the input bias current is typically
–8nA. When the input common mode voltage is within
0.5V of the positive rail, the NPN stage is operating and the
input bias current is typically 15nA. Increases in tempera-
ture will cause the voltage at which operation switches
from the PNP input stage to the NPN input stage to move
towards V
untrimmed and is typically 1.8mV.
A Schottky diode in the collector of the input NPN transis-
tors, along with special geometries for these NPN transis-
tors, allows the LT1782 to operate with either or both of its
inputs above V
transistor is fully saturated and the input bias current is
typically 4 A at room temperature. The input offset volt-
age is typically 1.8mV when operating above V
LT1782 will operate with its inputs 18V above V
less of V
+
.
+
. The input offset voltage of the NPN stage is
+
. At about 0.3V above V
U
U
W
+
, the NPN input
U
+
, the PNP
–
regard-
+
. The
The inputs are protected against excursions as much as
10V below V
input and a diode from the input to the negative supply.
The input stage of the LT1782 incorporates phase reversal
protection to prevent the output from phase reversing for
inputs up to 9V below V
between the inputs and the maximum differential input
voltage is 18V.
Output
The output of the LT1782 can swing to within 60mV of the
positive rail with no load and within 3mV of the negative
rail with no load. When monitoring voltages within 60mV
of the positive rail or within 3mV of the negative rail, gain
should be taken to keep the output from clipping. The
LT1782 can sink and source over 30mA at 5V supplies,
sourcing current is reduced to 10mA at 3V total supplies
as noted in the Electrical Characteristics.
The LT1782 is internally compensated to drive at least
600pF of capacitance under any output loading condi-
tions. A 0.22 F capacitor in series with a 150 resistor
between the output and ground will compensate these
amplifiers for larger capacitive loads, up to 10,000pF, at all
output currents.
Distortion
There are two main contributors to distortion in op amps:
output crossover distortion as the output transitions from
sourcing to sinking current, and distortion caused by
nonlinear common mode rejection. If the op amp is
operating inverting, there is no common mode induced
distortion. If the op amp is operating in the PNP input stage
(input is not within 0.8V of V
–
by an internal 6k resistor in series with each
–
. There are no clamping diodes
+
), the CMRR is very good,
LT1782
11