LTC2171-14 LINER [Linear Technology], LTC2171-14 Datasheet - Page 21

• Manufacturer Part Number: LTC2171-14
• Description: Quad 14-Bit, 125Msps ADC with Integrated Drivers
• Manufacturer: LINER [Linear Technology]

applicaTions inForMaTion
GROUNDING AND BYPASSING
The LTM9012 requires a printed circuit board with a
clean unbroken ground plane. A multilayer board with an
internal ground plane in the first layer beneath the ADC is
recommended. Layout for the printed circuit board should
ensure that digital and analog signal lines are separated as
much as possible. In particular, care should be taken not
to run any digital track alongside an analog signal track
or underneath the ADC.
Bypass capacitors are integrated inside the package; ad-
ditional capacitance is optional.
The analog inputs, encode signals, and digital outputs
should not be routed next to each other. Ground fill and
grounded vias should be used as barriers to isolate these
signals from each other.
LAYOUT RECOMMENDATIONS
The pin assignments of the LTM9012 allow a flow-through
layout that makes it possible to use multiple parts in a
small area when a large number of ADC channels are
required. The LTM9012 has similar layout rules to other
BGA packages. The layout can be implemented with 6mil
blind vias and 5mil traces. The pinout has been designed
to minimize the space required to route the analog and
digital traces. The analog and digital traces can essentially
be routed within the width of the package. This allows
multiple packages to be located close together for high
channel count applications. Trace lengths for the analog
inputs and digital outputs should be matched as well as
possible. Table 5 lists the trace lengths for the analog inputs
and digital outputs inside the package from the die pad to
the package pad. These should be added to the PCB trace
lengths for best matching.
Figures 7 through Figure 11 show an example of a good
PCB layout.
HEAT TRANSFER
Most of the heat generated by the LTM9012 is transferred
from the die through the bottom side of the package
through numerous ground pins onto the printed circuit
board. For good electrical and thermal performance, these
pins should be connected to the internal ground planes
by an array of vias.
Table 5. Internal Trace Lengths
Q10
R11
R12
R10
S11
S12
A12
A11
S10
P10
PIN
Q9
R9
S2
S3
R4
R5
R2
R3
Q4
Q5
A9
A8
A6
A5
A3
A2
P1
N1
P4
S9
S4
S5
P5
P9
P3
PAR/SER
NAME
CH1
CH1
CH2
CH2
CH3
CH3
CH4
CH4
DCO
DCO
01A
01A
01B
01B
02A
02A
02B
02B
03A
03A
03B
03B
04A
04A
04B
04B
CLK
CLK
SCK
SD0
FR
FR
SDI
CS
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
LTM9012
(mm)
0.535
0.350
2.185
2.216
0.174
0.667
2.976
2.972
3.033
3.031
0.752
0.370
2.130
2.125
0.332
0.527
7.741
7.723
4.632
4.629
3.987
3.988
7.892
7.896
3.317
3.325
0.241
1.912
1.927
2.097
2.082
0.226
1.553
0.957
1.184
21
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