LTC1983-3 LINER [Linear Technology], LTC1983-3 Datasheet - Page 5

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LTC1983-3

Manufacturer Part Number
LTC1983-3
Description
100mA REGULATED CHARGE-PUMP INVERTERS IN THINSOT
Manufacturer
LINER [Linear Technology]
Datasheet
BLOCK DIAGRA
PI FU CTIO S
V
2.3V and 5.5V. V
ESR capacitor as close as possible to the pin for best
performance.
V
should be bypassed with a 4.7 F low ESR capacitor as
close as possible to the pin for best performance.
C
nal. This node is switched between V
connected to V
IN
OUT
+
(Pin 3): Charge Pump Flying Capacitor Positive Termi-
U
(Pin 1): Charge Pump Input Voltage. May be between
(Pin 2): Regulated Output Voltage for the IC. V
U
CC
IN
during shutdown).
should be bypassed with a 4.7 F low
C
1 F
V
C
10 F
FLY
U
OUT
OUT
C
C
+
W
CHARGE PUMP
S1A
S2A
S1B
S2B
IN
and GND (It is
CLOCK1
CLOCK2
CONTROL
LOGIC
OUT
LTC1983-X
C
nal. This node is switched between GND and V
connected to GND during shutdown).
GND (Pin 5): Signal and Power Ground for the 6-Pin
SOT-23 package. This pin should be tied to a ground plane
for best performance.
SHDN (Pin 6): Shutdown. Grounding this pin shuts down
the IC. Tie to V
above the V
(Pin 4): Charge Pump Flying Capacitor Negative Termi-
COMP1
+
IN
LTC1983-3/LTC1983-5
1 A
voltage or below GND.
IN
to enable. This pin should not be pulled
V
REF
1983 BD
C
10 F
V
SHDN
IN
IN
OUT
sn1983 1983fs
(It is
5

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