LTC1929-PG LINER [Linear Technology], LTC1929-PG Datasheet - Page 18

• Manufacturer Part Number: LTC1929-PG
• Description: 2-Phase, High Efficiency,Synchronous Step-Down Switching Regulators
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
LTC1929/LTC1929-PG
after C
assumption that the output is in an overcurrent condition.
If the condition lasts for a long enough period as deter-
mined by the size of C
until the RUN/SS pin voltage is recycled. If the overload
occurs during start-up, the time can be approximated by:
If the overload occurs after start-up the voltage on the
RUN/SS capacitor will continue charging and will provide
additional time before latching off:
This built-in overcurrent latchoff can be overridden by
providing a pull-up resistor, R
shown in Figure 6. This resistance shortens the soft-start
period and prevents the discharge of the RUN/SS capaci-
tor during a severe overcurrent and/or short-circuit con-
dition. When deriving the 5 A current from V
figure, current latchoff is always defeated. The diode
connecting of this pull-up resistor to INTV
Figure 6, eliminates any extra supply current during shut-
down while eliminating the INTV
ing controller start-up.
Why should you defeat current latchoff? During the
prototyping stage of a design, there may be a problem with
noise pickup or poor layout causing the protection circuit
to latch off the controller. Defeating this feature allows
troubleshooting of the circuit and PC layout. The internal
short-circuit and foldback current limiting still remains
active, thereby protecting the power supply system from
failure. A decision can be made after the design is com-
plete whether to rely solely on foldback current limiting or
to enable the latchoff feature by removing the pull-up
resistor.
18
t
t
LO1
LO2
3.3V OR 5V
*OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF
SS
(C
(C
reaches 4.1V, C
SS
SS
D1
Figure 6. RUN/SS Pin Interfacing
• 0.6V)/(1.2 A) = 5 • 10
• 3V)/(1.2 A) = 2.5 • 10
V
IN
R
U
SS
*
RUN/SS
SS
, the controller will be shut down
U
C
SS
SS
begins discharging on the
SS
CC
, to the RUN/SS pin as
loading from prevent-
W
D1*
INTV
5
6
(C
(C
CC
R
SS
SS
SS
*
)
)
IN
RUN/SS
U
CC
as in the
, as in
1929 F06
C
SS
The value of the soft-start capacitor C
scaled with output voltage, output capacitance and load
current characteristics. The minimum soft-start capaci-
tance is given by:
The minimum recommended soft-start capacitor of C
0.1 F will be sufficient for most applications.
Phase-Locked Loop and Frequency Synchronization
The LTC1929 has a phase-locked loop comprised of an
internal voltage controlled oscillator and phase detector.
This allows the top MOSFET turn-on to be locked to the
rising edge of an external source. The frequency range of
the voltage controlled oscillator is 50% around the
center frequency f
of 1.2V corresponds to a frequency of approximately
220kHz. The nominal operating frequency range of the
LTC1929 is 140kHz to 310kHz.
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
external and internal oscillators. This type of phase detec-
tor will not lock up on input frequencies close to the
harmonics of the VCO center frequency. The PLL hold-in
range, f
The output of the phase detector is a complementary pair
of current sources charging or discharging the external
filter network on the PLLFLTR pin. A simplified block
diagram is shown in Figure 7.
PLLIN
C
SS
EXTERNAL
f
H
OSC
= f
> (C
Figure 7. Phase-Locked Loop Block Diagram
H
, is equal to the capture range, f
C
OUT
50k
= 0.5 f
)(V
O
OUT
FREQUENCY
DETECTOR
DETECTOR
. A voltage applied to the PLLFLTR pin
DIGITAL
PHASE/
PHASE
O
)(10
(150kHz-300kHz)
-4
)(R
2.4V
SENSE
)
SS
may need to be
C:
PLLFLTR
R
10k
LP
OSC
C
LP
1929 F07
SS
=