LTC1923 LINER [Linear Technology], LTC1923 Datasheet - Page 24

• Manufacturer Part Number: LTC1923
• Description: High Efficiency Thermoelectric Cooler Controller
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
LTC1923
Higher Voltage Applications
A bank of TECs can be wired in series to minimize board
real estate utilized by the application. A higher voltage
supply may be required depending upon how many TECs
are placed in series and what their maximum voltage
drop is. In other applications, only one high current
supply may be available, with the output voltage of this
supply being greater than the LTC1923’s absolute maxi-
mum voltage rating. The absolute maximum input voltage
for the LTC1923 is 6V. Since the current drawn by the
LTC1923 is small, it can be powered from a low current,
5V (or less) supply. A 12V application for driving the full
bridge is shown in Figure 15. Two LTC1693-1 high speed
dual MOSFET drivers are used to step up the lower voltage
produced by the LTC1923 drivers to the higher voltage
levels required to drive the full bridge. The LTC1693
requires proper bypassing and grounding due to its high
switching speed and large AC currents. Mount the low
ESR bypass capacitors as close to the pins as possible,
shortening the leads as much as possible to reduce
inductance. Refer to the LTC1693 data sheet for more
information. Since the LTC1693-1 low-to-high and high-
to-low propagation delays are almost identical (typically
35ns), there is minimal skew introduced by the addition
of these drivers. Sufficient dead time (typically 50ns)
between one leg of the bridge shutting off and the other
turning on, as set up by the LTC1923, will be maintained.
If this dead time is insufficient, the resistor tied to the R
pin can be increased to increase this time.
Care must be taken to ensure that the external MOSFETs
are properly selected based on the maximum drain-source
voltage, V
MOSFETs that have an absolute maximum V
have a maximum V
12V applications. Even the 14V maximum V
Si9801DY may not provide adequate margin for a 12V
bridge supply voltage. Refer to Efficiency Considerations
for more discussion about selecting a MOSFET with
R
24
DS(ON).
DS
, gate-source voltage, V
GS
U
of only 12V, which is insufficient for
U
W
GS
, and R
GS
DS(ON)
rating of the
U
DS
of 20V
. Many
T
Two pairs of resistors, R
ensure that the absolute maximum input voltage is not
exceeded on the TEC
voltage on TEC
supply to the LTC1923 which, for this example, is 5V. The
following equation will guarantee this:
where V
circuitry and V
These additional level shifting resistors affect some pa-
rameters in the data sheet. The direction comparator
thresholds are increased to:
The output voltage on the V
across the TEC (V
(1 + R
The term containing 100k is the loading error introduced
by the input impedance of the differential amplifier. Typi-
cally this value will be 100k, but can vary due to normal
process tolerances and temperature (up to 30%). Due to
this variability, it may be desirable to minimize the loading
effect to try to keep a tight tolerance on the TEC clamp
voltage. Although it will increase quiescent current draw,
this can be accomplished by making the value of R
small as possible.
As a result of this level shifting, the TEC voltage necessary
to activate the clamp is raised. The voltage across the TEC
where the voltage clamp activates will be:
One drawback with using the LTC1693 MOSFET drivers is
the inability to adjust the slew rate of the output drivers to
reduce system noise.
(1 + R
(1 + R
V
V
VTEC
TECOOLER
1
T1
R
R
BRIDGE
/R
V
T1
T1
= V
T
BRIDGE
T
T2
2
1
/R
/R
TECOOLER
+ R
T2
T2
= (1 + R
DD
+
is the supply voltage to the external bridge
100
R
+ R
+ R
and TEC
T1
T
is the input supply to the LTC1923.
1
/100k) or:
k
T1
T1
TECOOLER
/100k) • – 50mV
/(1 + R
/100k) • 50mV and
+
T1
and TEC
/R
V
–
DD
T1
must be less than the V
T2
TEC
T1
+ R
and R
) reduced by a factor of
/R
pin represents the voltage
T1
–
T2
inputs. The maximum
/100k) • 2.5V
T2,
+ R
must be added to
T1
/100k)
DD
input
T1
1923f
as