LTC1871-1 LINER [Linear Technology], LTC1871-1 Datasheet - Page 24

• Manufacturer Part Number: LTC1871-1
• Description: High Effi ciency, Synchronous, 4-Switch Buck-Boost Controller
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
LTC3780
• Use immediate vias to connect the components (in-
• Use planes for V
• Flood all unused areas on all layers with copper. Flooding
• Segregate the signal and power grounds. All small-
• Place switch B and switch C as close to the controller
• Keep the high dV/dT SW1, SW2, BOOST1, BOOST2,
• The path formed by switch A, switch B, D1 and the C
• The output capacitor (–) terminals should be connected
24
cluding the LTC3780’s SGND and PGND pins) to the
ground plane. Use several large vias for each power
component.
fi ltering and to keep power losses low.
with copper will reduce the temperature rise of power
components. Connect the copper areas to any DC net
(V
signal components should return to the SGND pin at
one point, which is then tied to the PGND pin close to
the sources of switch B and switch C.
as possible, keeping the PGND, BG and SW traces
short.
TG1 and TG2 nodes away from sensitive small-signal
nodes.
capacitor should have short leads and PC trace lengths.
The path formed by switch C, switch D, D2 and the
C
trace lengths.
as close as possible the (–) terminals of the input
capacitor.
OUT
IN
or GND).
capacitor also should have short leads and PC
IN
and V
OUT
to maintain good voltage
IN
• Connect the top driver boost capacitor C
• Connect the input capacitors C
• Connect V
• Route SENSE
• Connect the I
• Connect the INTV
BOOST1 and SW1 pins. Connect the top driver boost
capacitor C
C
tors carry the MOSFET AC current in boost and buck
mode.
nals of C
capacitor may be connected closely to the LTC3780 SGND
pin. The R2 connection should not be along the high
current or noise paths, such as the input capacitors.
PC trace spacing. Avoid sense lines pass through noisy
area, such as switch nodes. The fi lter capacitor between
SENSE
to the IC. Ensure accurate current sensing with Kelvin
connections at the SENSE resistor. One layout example
is shown in Figure 12.
IC, between I
tor helps to fi lter the effects of PCB noise and output
voltage ripple voltage from the compensation loop.
IC, between the INTV
capacitor carries the MOSFET drivers’ current peaks.
An additional 1μF ceramic capacitor placed immediately
next to the INTV
noise performance substantially.
OUT
closely to the power MOSFETs. These capaci-
+
OUT
and SENSE
OSENSE
B
and signal ground. A small V
TH
–
closely to the BOOST2 and SW2 pins.
TH
and SENSE
and the signal ground pins. The capaci-
pin compensation network close to the
CC
CC
pin resistive dividers to the (+) termi-
bypass capacitor, C
and PGND pins can help improve
CC
–
should be as close as possible
and the power ground pins. This
+
leads together with minimum
IN
and output capacitors
VCC
A
OSENSE
closely to the
, close to the
bypass
3780fe